
OVP simulators and emulators with ARC modelsWelcome to the Open Virtual Platforms (OVP) simulator and ARC models. These make it easy and efficient to develop software on ARC models of processors on your desktop PC running Windows XP or Linux.Free Simulation for Non-Commercial UseThe OVPsim simulator is available to download and use on Windows and Linux, runs between 100 mips to 2,000 mips on a standard desktop PC and includes open source models of the ARC models.ARC modelsThe ARC models can be downloaded and run from the ARC models download pages.SupportSupport is available through our forums, and information on model availability is through our wiki based library pages.Registration to downloadYou will need to be registered and logged-in to download any files from this OVP site. Click here to register/login.OVP beginningsOVP was founded by Imperas and they provide embedded software development tools including multicore debug and advanced software verification and the tools target ARC models for use with bare metal and embedded OSes. OVPsim is free for non-commercial usage. If you need a simulator for commercial use - please contact Imperas.Videos of demonstrations of ARC modelsTo watch recorded demonstrations of how easy it is to download and use ARC models, then click here to have a look at the videos.Open Virtual Platforms (OVP) and its focusTo learn about the focus of OVP and ARC models, then click here.OVP TechnologyTo learn about the technology of OVP and ARC models, then click here.Models available from OVP and how to develop your own modelsTo find out about the other models available from OVP related to ARC models, then click here.OVP FAQFor answers to commonly asked questions regarding OVP and Open Virtual Platforms, then click here.Virtualized Software DevelopmentIf you are looking to use Eclipse or GDB to do application development with ARC models, then click here.About OVPThe focus of OVP is to accelerate the adoption of the new way to develop embedded software - especially for SoC and MPSoC platforms. If you are developing software to run in an embedded system you will probably already be using an Instruction Set Simulator (ISS) and associated debugger. As you move to having multiple processors or cores in your design then you will need more than just a single ISS. What is needed is a model of your platform that includes models of all the processors or cores and models of the peripherals and behavioral components that the software communicates with. This is a Virtual Platform, or more simply just a simulation model of your design. OVP provides this for you: libraries of processor and behavioral models, and APIs for building you own processors, peripherals and platforms. This is just what is needed to use existing models or build your own, and OVP is easy to use, open, flexible, and importantly, free for non-commercial use.If you want to understand the rationale for the use of Virtual Platforms and the industry developments that have driven the creation of OVP - please look at the slides or listen to the presentation from Imperas, the company who developed the base for OVP. If you want to see who is involved with OVP and what the industry is saying then please visit the news pages. The industry is facing a rising challenge: "30 to 50 per cent of R&D budgets are spent on software, and the cost is rising 20 per cent a year. The software effort overtakes the hardware effort at 130nm." Jack Browne, MIPS Technologies "Some say we are at a crisis stage with the software side overwhelming the hardware side. Driving some of this is the proliferation of cores in system-on-chip (SoC) devices." Steve Roddy, Tensilica Adopting Virtual Platforms enables earlier development and testing of software, dramatically reducing SoC schedules and should significantly reduce initial development and maintenance costs for embedded software. "Imperas believes that software virtual platform infrastructure should be open and be freely available. To that end, we are sharing, making public, and making open our simulation infrastructure technologies with the intention of establishing a common, open standard platform for software virtual platforms for software developers. We started developing our simulation infrastructure in 2004 and it has been in customer production use since early 2006. We are making this technology available to OVP users. However, it is not solely through our efforts that these technologies become successful. Participation of organizations and individuals around the world is critical to the success of OVP. We thank all those that are participating in this community." Simon Davidmann, Imperas, Jan 2008 Please sign-up for and participate in the forums, have a look at new developments, and please do download some of the examples, get a feel for the benefits you can get from the adoption of OVP - and please use OVP in your commercial, research, or educational projects - and use the forums for feedback, advice, questions - and to get involved please go to and 'get involved' in the forum! The Rationale for Software Virtual Platforms More InformationFor more information on any other items, go to the OVP Home page or click on one of the links below:ARC models, ARC open source model, ARC ISS, ARC virtual platform, ARC processor model, ARC platform models, ARC platform model, ARC platform simulations, ARC platform simulator, ARC platform emulations, ARC platform emulator, ARC processor simulations, ARC multicore simulations, ARC multicore simulator, ARC multicore software, ARC multicore software development, ARC multicore software simulation, ARC processor emulations, ARC processor emulator, ARC CPU simulations, ARC CPU simulator, ARC CPU emulations, ARC CPU emulator, ARC CPU model, ARC fast processor model, ARC fast CPU model, ARC fast ISS model, ARC virtual processor, ARC virtual platform, ARC virtual CPU, ARC Virtualized Systems Development, ARC Virtualized Software Development, ARC free processor simulator, ARC free platform simulator, ARC free platform simulator, ARC free simulator, ARC emulator, ARC simulator, ARC platform, ARC free CPU simulator, ARC GDB debug, ARC GDB debugging, ARC multicore debugging, ARC multicore GDB debugging, Virtualized Software Development Platforms |
OVP DocumentationView OVPsim, API and other documents OVP Simulator DownloadVirtual Platform Simulator package OVP Model DownloadsHere are some links to other pages that have downloads for the different processor families ARM ProcessorsSource Models, Examples and Demonstrations of different ARM models and platforms MIPS ProcessorsVirage ARC ProcessorsSource Models, Examples and Demonstrations of different Virage ARC models and platforms NEC v850 ProcessorsSource Models, Examples and Demonstrations of different NEC v850 models and platforms Power Architecture ProcessorsTensilica ProcessorsModels, Examples and Demonstrations of different Tensilica models and platforms OpenCores ProcessorsSource Models, Examples and Demonstrations of different OpenCores models and platforms SystemC TLM2.0 Processor ModelsSource Models, Examples and Demonstrations of different SystemC TLM2.0 models and platforms Industry Support and Comments |