This page is for the OVP downloads for processors that do not have a dedicated menu tab above.
OVP Support for Xilinx MicroBlaze Processors
This section is dedicated to the Xilinx MicroBlaze processors. 
The MicroBlaze(tm) core is a 32-bit RISC Harvard architecture soft processor core with a rich instruction set optimized for embedded applications. With the MicroBlaze soft processor solution, you have complete flexibility to select the combination of peripheral, memory and interface features that will give you the exact system you need at the lowest cost possible on a single FPGA. More information on the different available cores can be found on the Xilinx MicroBlaze website here. The Xilinx MicroBlaze site shows capabilities and features of the different processors. Where are the demos and examples?There are several example platforms that are part of the normal OVP downloads (available from the sections on the right of this and other download pages) and once OVPsim is downloaded and installed you will find them in the Imperas\Demo\OVPsim_microblaze directories. There are several simple bare metal platforms ranging from a single core instance up to 24 cores running simple applications/benchmarks such as Dhrystone, Linpack, and Fibonacci code etc.As with other OVP models the packages include full open source of platforms, applications and models and provide a semihosting library allowing functions like printf to work in bare metal platforms. What Xilinx MicroBlaze processors are supported?We are working on completing the functionality of the models. You will need to download them and see the documentation to see any current limitiations. To list the currently supported variants, please visit the Xilinx MicroBlaze processor page in the libary.What Xilinx MicroBlaze compilers and tool chains are supported?We provide an initial version of the GNU C tools but expect users to have their own software compilation environments, normally supplied by the processor IP provider.Xilinx MicroBlaze Demo Slide PresentationNot Yet Available.Xilinx MicroBlaze Demo Video PresentationNot Yet Available.openCores OR1K processorFor the openCores OR1K processor on the right you will see the different downloads available - simple single processor platforms running benchmark applications through to multi-core examples and also a platform that boots uClinux. Also - there is the download of the model itself - including many examples of using it - and its source. Also there are GCC, GDB etc toolchains you will need to compile and run applications. Using the OVP OR1K modelTo use the OR1K you will need several things downloaded. You will need to download a) the OVPSim simulator, b) the OR1K model itself, and c) if you don't already have the toolchain to compile up applications, you will need that too... And then take a look at some of the examples - they provide pointers as to what is needed for starter platforms. Then you will need to write your own platform.c file, application.c and when compiled - you will be all set.OR1K Demo Slide Presentation (View)You could walk through this presentation to get a feel for how easy it is to use the OR1K model. To find out more about the technology behind the model - please go to the Technology pages. OR1K Demo Video Presentation View LargeFor a demo of how easy it is to download, and a quick walk through downloading and running the applications please watch the video:
OVP Support for Tensilica ProcessorsTo read the Press Release about the relationship with Tensilica click here. On the right you will see the different downloads available related to Tensilica processors - from simple single processor platforms running benchmark applications through to multi-core examples. You can use Tensilica processor models obtainable from Tensilica within OVP simulations. This is accomplished by 'wrapping' the Tensilica processor model with an 'integration adaptor' to encapsulate it and make it appear to an OVP platform as a normal OVP processor model. Using the OVP encapsulated Tensilica processor modelTo use the Tensilica model you will need several things downloaded. You will need to download a) the OVPsim simulator (see link on right) , b) the Tensilica model itself, and c) if you don't already have the toolchain to compile up Tensilica applications, you will need that too... And then take a look at some of the examples - they provide pointers as to what is needed for starter platforms. Then you will need to write your own platform.c file, application.c and when compiled - you will be all set.Where are the platforms and wrappers?The example platforms are now part of the normal OVPsim download and once OVPsim is downloaded and installed you will find them in the Examples\Vendors\Tensilica directory.The Tensilica Diamond Core encapsulation or wrapper is now part of the normal OVPsim download and once OVPsim is downloaded and installed you will find it in the lib\Windows\ImperasLib\imperas.com\processor\diamondCore directory. What Tensilica Diamond Cores are supported?To list the currently supported Diamond Cores, please visit the Tensilica Diamond Core page in the libary.Tensilica Demo Slide PresentationNot Available.Tensilica Demo Video PresentationNot Available. |
OVP DocumentationSearch and view all the OVP documents by visiting here. Obtaining a license keyOVPsim requires a license key to run. This can be obtained by visiting the Obtaining an OVPsim License Key pageOVP DownloadsPrevious ReleasesTo view and download previous OVP releases, visit here.Current release: 20120313.0The current release has been available for 67 days. Please uninstall the previous release before installing the new release or components of it. The changes in this release can be viewed here. Don't mix releases.Comments on OVP... |
