Imperas™ and OVP™ Support ARM Cortex-M Cores and Provide Free, Open Source Models

Imperas is a Founding Member of the Cadence System Realization Alliance

THAME, United Kingdom, December 6, 2010 – Imperas™ today released its first models of the Cortex family of processor cores from ARM. Models of the M-series of cores are now available from Open Virtual Platforms™ (OVP™), including example virtual platforms incorporating the cores and support for the cores in Imperas’ advanced software development tools. Additionally, these and other models will be used by Imperas in its collaboration with Cadence Design Systems to deliver on the EDA360 vision for System Realization.

The processor core models and example platforms are available from the Open Virtual Platforms website, The models of the ARM Cortex processor cores, as well as models of the other ARM processors including the ARM7, ARM9, ARM10 and ARM11 families, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

“Virtual platforms provide the visibility and controllability we need for our development projects,” said Christian Gehrmann of the Sweden Institute of Computer Science. “OVP, with its performance, ease of use, and library of the latest ARM processor core models, has been an excellent tool for us in our projects.”

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The OVP simulator also has an integration with the Eclipse IDE, enabling easy use for software developers. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.

“We are using OVP virtual platforms for architecture exploration and as a development vehicle for firmware,” said Maxime de Nanclas, president of Nuum Design Inc. “We found that bringing up a real time operating system and application software on our OVP virtual platform with an ARM processor core model was easier and faster than working with hardware development boards.”

Imperas, which is a member of the ARM Connected Community, is making the new OVP models of the ARM Cortex M-series, including the popular ARM Cortex-M3 processor core, available now from the OVP website. Processor core models for other ARM Cortex cores will be available within the next 16 weeks. OVP already offers ARM developers access to models of other ARM processors, including processors which utilize the v4, v5 and v6 ARM instruction sets. OVP also has reference virtual platforms incorporating the ARM cores, including bare metal platforms, a virtual platform of an Atmel AT91sam7 processor (based on an ARM7 core), and a virtual platform of the ARM IntegratorCP development board using the ARM926EJ-S. This IntegratorCP virtual platform enables users to boot Linux in under 10 seconds on a 2GHz laptop using OVPsim™. These reference platforms are all available as source code, and are easily modified to add or change the memory and peripheral components to customize the platform as required for software development.

Cadence recently articulated an industry vision, EDA360, which talks to application-driven system development, with System Realization being one of the three elements that the industry needs to address with new offerings and broader collaboration. Imperas has joined the Cadence System Realization Alliance; its technology, including OVP and Imperas’ advanced software development tools, has been integrated with Cadence Incisive Enterprise Simulator and Incisive Software Extensions products, to better address the growing need for software development with robust verification.

“Addressing system development needs will require collaboration and partnerships, and we are excited to have Imperas as a member of the System Realization Alliance,” said Micha? Siwi?ski, group director of product management for System Realization at Cadence. “Their Open Virtual Platforms technology, model creation tools and the large library of fast processor core models complements Cadence System Realization offerings to provide an effective solution for system and software development.”

“Whether we are talking about relatively simple systems based on high-end microcontrollers like the ARM Cortex M-series, or more complex multicore systems, embedded software today requires state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP, with ultrafast simulation, accelerates the development cycle and makes debug easier for software engineers. And participating in the Cadence System Realization Alliance by integrating OVP and Imperas tools with proven Cadence products helps to expand the range of solutions available to software developers.”

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