Imperas joins Synopsys System-Level Catalyst Program as a founding charter member

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, has announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.

Imperas is a founding charter member, joining at the program's creation. "The integration of Open Virtual Platforms (OVP) processor models with the Synopsys Innovator tools provides customers with an expanded set of IP with which to build virtual platforms. Moreover, the native TLM-2.0 interface in the instruction accurate OVP models ensures that users will have the fastest possible simulation performance, as is required for software development on virtual platforms, " said Simon Davidmann, Imperas CEO.

System-Level Catalyst Program is designed to benefit mutual customers by advancing tool and model interoperability as well as availability of system-level models and services.

The members of the program include Synopsys, Imperas, and many other supporters of the Open Virtual Platforms initiative, including: Carbon, CriticalBlue, Doulos, Forte, GreenSocs, and Tensilica.

[For more information, please see the Synopsys press release here]