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ArmL2CachePL310



OVP Peripheral Model: ArmL2CachePL310



Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Description

ARM PL310 L2 Cache Control Registers

Licensing

Open Source Apache 2.0

Limitations

Programmers View, register model only. Does NOT model functionality, just provides registers to allow code to run.

Reference

ARM PrimeCell Level 2 Cache Controller (PL310) Technical Reference Manual (ARM DDI 0246)

Location

The L2CachePL310 peripheral model is located in an Imperas/OVP installation at the VLNV: arm.ovpworld.org / peripheral / L2CachePL310 / 1.0.



Net Ports

This model has the following net ports:

Table : Net Ports

NameTypeMust Be ConnectedDescription
irqoutputF (False)



Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table 1: Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000F (False)

Table 2: Bus Slave Port: bport1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile
ab_reg0_cache_id0x032
ab_reg0_cache_type0x432
ab_reg1_control0x10032
ab_reg1_aux_control0x10432
ab_reg1_tag_ram_control0x10832
ab_reg1_data_ram_control0x10c32
ab_reg2_ev_counter_ctrl0x20032
ab_reg2_ev_counter1_cfg0x20432
ab_reg2_ev_counter0_cfg0x20832
ab_reg2_ev_counter10x20c32
ab_reg2_ev_counter00x21032
ab_reg2_int_maske0x21432
ab_reg2_int_mask_statuse0x21832
ab_reg2_int_raw_statuse0x21c32
ab_reg2_int_cleare0x22032
ab_reg7_cache_sync0x73032
ab_reg7_inv_pa0x77032
ab_reg7_inv_way0x77c32
ab_reg7_clean_pa0x7b032
ab_reg7_clean_index0x7b832
ab_reg7_clean_way0x7bc32
ab_reg7_clean_inv_pa0x7f032
ab_reg7_clean_inv_index0x7f832
ab_reg7_clean_inv_way0x7fc32
ab_reg9_d_lockdown00x90032
ab_reg9_i_lockdown00x90432
ab_reg9_d_lockdown1f0x90832
ab_reg9_i_lockdown1f0x90c32
ab_reg9_d_lockdown2f0x91032
ab_reg9_i_lockdown2f0x91432
ab_reg9_d_lockdown3f0x91832
ab_reg9_i_lockdown3f0x91c32
ab_reg9_d_lockdown4f0x92032
ab_reg9_i_lockdown4f0x92432
ab_reg9_d_lockdown5f0x92832
ab_reg9_i_lockdown5f0x92c32
ab_reg9_d_lockdown6f0x93032
ab_reg9_i_lockdown6f0x93432
ab_reg9_d_lockdown7f0x93832
ab_reg9_i_lockdown7f0x93c32
ab_reg9_lock_line_eng0x95032
ab_reg9_unlock_wayg0x95432
ab_reg12_addr_filt_start0xc0032
ab_reg12_addr_filt_end0xc0432
ab_reg15_debug_ctrl0xf4032
ab_reg15_prefetch_ctrl0xf6032
ab_reg15_power_ctrl0xf8032



Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 3: Publicly available platforms using peripheral 'L2CachePL310'

Platform NameVendor
HeteroArmVersatileExpressLinuxwithMicroBlazeimperas.ovpworld.org
AlteraCycloneV_HPSaltera.ovpworld.org
ArmVersatileExpressarm.ovpworld.org
ArmVersatileExpress-CA9arm.ovpworld.org
AlteraCycloneV_HPSaltera.ovpworld.org
ArmVersatileExpressarm.ovpworld.org
ArmVersatileExpress-CA9arm.ovpworld.org
Zynq_PSxilinx.ovpworld.org



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