Name | Type | Must Be Connected | Description |
---|---|---|---|
Reset | input | F (False) |
Table : Net Ports
Name | Type | Must Be Connected | Description |
---|---|---|---|
Reset | input | F (False) |
Table 1: Bus Slave Port: bport1
Name | Size (bytes) | Must Be Connected | Description |
---|---|---|---|
bport1 | 0x1000 | F (False) |
Table 2: Bus Slave Port: bport1 Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|---|---|---|---|---|
ab_CSAR0 | 0x0 | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR0 | 0x4 | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR0 | 0x8 | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSAR1 | 0xc | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR1 | 0x10 | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR1 | 0x14 | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSAR2 | 0x18 | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR2 | 0x1c | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR2 | 0x20 | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSAR3 | 0x24 | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR3 | 0x28 | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR3 | 0x2c | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSAR4 | 0x30 | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR4 | 0x34 | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR4 | 0x38 | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSAR5 | 0x3c | 32 | Chip select address register, array offset: 0x0, array step: 0xC | ||
ab_CSMR5 | 0x40 | 32 | Chip select mask register, array offset: 0x4, array step: 0xC | ||
ab_CSCR5 | 0x44 | 32 | Chip select control register, array offset: 0x8, array step: 0xC | ||
ab_CSPMCR | 0x60 | 32 | Chip select port multiplexing control register, offset: 0x60 |
Table 3: Publicly available platforms using peripheral 'KinetisFB'