Name | Type | Description |
---|---|---|
frequency | uns64 | Frequency of the clock input in MHz (default is 80MHz) |
Table : Peripheral Parameters
Name | Type | Description |
---|---|---|
frequency | uns64 | Frequency of the clock input in MHz (default is 80MHz) |
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|---|---|---|
Reset | input | F (False) | |
irq0 | output | F (False) | IRQ port |
irq1 | output | F (False) | IRQ port |
irq2 | output | F (False) | IRQ port |
irq3 | output | F (False) | IRQ port |
trg0 | output | F (False) | Trigger port |
trg1 | output | F (False) | Trigger port |
trg2 | output | F (False) | Trigger port |
trg3 | output | F (False) | Trigger port |
Table 2: Bus Slave Port: bport1
Name | Size (bytes) | Must Be Connected | Description |
---|---|---|---|
bport1 | 0x1000 | F (False) |
Table 3: Bus Slave Port: bport1 Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|---|---|---|---|---|
ab_MCR | 0x0 | 32 | |||
ab2_0_LDVAL | 0x100 | 32 | Timer Load Value Register | ||
ab2_0_CVAL | 0x104 | 32 | Current Timer Value Register | ||
ab2_0_TCTRL | 0x108 | 32 | Timer Control Register | ||
ab2_0_TFLG | 0x10c | 32 | Timer Flag Register | ||
ab2_1_LDVAL | 0x110 | 32 | Timer Load Value Register | ||
ab2_1_CVAL | 0x114 | 32 | Current Timer Value Register | ||
ab2_1_TCTRL | 0x118 | 32 | Timer Control Register | ||
ab2_1_TFLG | 0x11c | 32 | Timer Flag Register | ||
ab2_2_LDVAL | 0x120 | 32 | Timer Load Value Register | ||
ab2_2_CVAL | 0x124 | 32 | Current Timer Value Register | ||
ab2_2_TCTRL | 0x128 | 32 | Timer Control Register | ||
ab2_2_TFLG | 0x12c | 32 | Timer Flag Register | ||
ab2_3_LDVAL | 0x130 | 32 | Timer Load Value Register | ||
ab2_3_CVAL | 0x134 | 32 | Current Timer Value Register | ||
ab2_3_TCTRL | 0x138 | 32 | Timer Control Register | ||
ab2_3_TFLG | 0x13c | 32 | Timer Flag Register |
Table 4: Publicly available platforms using peripheral 'KinetisPIT'