OVP Peripheral Model: FreescaleKinetisSPI

Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.


Model of the SPI peripheral used on the Freescale Kinetis platform


Provides the base behaviour for the OVP Freescale Kinetis platforms



Open Source Apache 2.0


The KinetisSPI peripheral model is located in an Imperas/OVP installation at the VLNV: / peripheral / KinetisSPI / 1.0.

Net Ports

This model has the following net ports:

Table : Net Ports

NameTypeMust Be ConnectedDescription
ResetinputF (False)

Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table 1: Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000F (False)

Table 2: Bus Slave Port: bport1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile
ab_MCR0x032DSPI Module Configuration Register, offset: 0x0
ab_TCR0x832DSPI Transfer Count Register, offset: 0x8
ab_CTAR00xc32DSPI Clock and Transfer Attributes Register 0, Master/Slave modes, offset 0x0c
ab_CTAR10x1032DSPI Clock and Transfer Attributes Register 1, Master mode, offset 0x10
ab_SR0x2c32DSPI Status Register, offset: 0x2C
ab_RSER0x3032DSPI DMA/Interrupt Request Select and Enable Register, offset: 0x30
ab_PUSHR0x3432DSPI PUSH TX FIFO Register In Master Mode, offset: 0x34
ab_POPR0x3832DSPI POP RX FIFO Register, offset: 0x38
ab_TXFR00x3c32DSPI Transmit FIFO Registers, offset: 0x3C
ab_TXFR10x4032DSPI Transmit FIFO Registers, offset: 0x40
ab_TXFR20x4432DSPI Transmit FIFO Registers, offset: 0x44
ab_TXFR30x4832DSPI Transmit FIFO Registers, offset: 0x48
ab_RXFR00x7c32DSPI Receive FIFO Registers, offset: 0x7C
ab_RXFR10x8032DSPI Receive FIFO Registers, offset: 0x80
ab_RXFR20x8432DSPI Receive FIFO Registers, offset: 0x84
ab_RXFR30x8832DSPI Receive FIFO Registers, offset: 0x88

Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 3: Publicly available platforms using peripheral 'KinetisSPI'

Platform NameVendor

Page was generated in 0.0530 seconds