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NxpIMX6_CCM



OVP Peripheral Model: NxpIMX6_CCM



Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Description

NXP i.MX6 CCM Clock Controller Module

Licensing

Open Source Apache 2.0

Limitations

This is a register only interface model. No functionality is implemented. The reset value for the CCM_CSCDR2 epdc_pix_clk_sel field (bits 11:9) has been modified from the documented value. The documented value (0x5) is reserved and causes a Linux Kernel Panic

Reference

i.MX 6Solo/6DualLite Applications Processor Reference Manual (IMX6SDLRM_Ref_Manual.pdf

Location

The iMX6_CCM peripheral model is located in an Imperas/OVP installation at the VLNV: nxp.ovpworld.org / peripheral / iMX6_CCM / 1.0.



Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table : Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000T (True)

Table 1: Bus Slave Port: bport1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile
ab_CCM_CCR0x032CCM Control Register
ab_CCM_CCDR0x432CCM Control Divider Register
ab_CCM_CSR0x832CCM Status Register
ab_CCM_CCSR0xc32CCM Clock Switcher Register
ab_CCM_CACRR0x1032CCM Arm Clock Root Register
ab_CCM_CBCDR0x1432CCM Bus Clock Divider Register
ab_CCM_CBCMR0x1832CCM Bus Clock Multiplexer Register
ab_CCM_CSCMR10x1c32CCM Serial Clock Multiplexer Register 1
ab_CCM_CSCMR20x2032CCM Serial Clock Multiplexer Register 2
ab_CCM_CSCDR10x2432CCM Serial Clock Divider Register 1
ab_CCM_CS1CDR0x2832CCM SSI1 Clock Divider Register
ab_CCM_CS2CDR0x2c32CCM SSI2 Clock Divider Register
ab_CCM_CDCDR0x3032CCM D1 Clock Divider Register
ab_CCM_CHSCCDR0x3432CCM HSC Clock Divider Register
ab_CCM_CSCDR20x3832CCM Serial Clock Divider Register 2 (modified reset value)
ab_CCM_CSCDR30x3c32CCM Serial Clock Divider Register 3
ab_CCM_CDHIPR0x4832CCM Divider Handshake In-Process Register
ab_CCM_CLPCR0x5432CCM Low Power Control Register
ab_CCM_CISR0x5832CCM Interrupt Status Register
ab_CCM_CIMR0x5c32CCM Interrupt Mask Register
ab_CCM_CCOSR0x6032CCM Clock Output Source Register
ab_CCM_CGPR0x6432CCM General Purpose Register
ab_CCM_CCGR00x6832CCM Clock Gating Register 0
ab_CCM_CCGR10x6c32CCM Clock Gating Register 1
ab_CCM_CCGR20x7032CCM Clock Gating Register 2
ab_CCM_CCGR30x7432CCM Clock Gating Register 3
ab_CCM_CCGR40x7832CCM Clock Gating Register 4
ab_CCM_CCGR50x7c32CCM Clock Gating Register 5
ab_CCM_CCGR60x8032CCM Clock Gating Register 6
ab_CCM_CMEOR0x8832CCM Module Enable Overide Register



Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 2: Publicly available platforms using peripheral 'iMX6_CCM'

Platform NameVendor
iMX6Snxp.ovpworld.org



NxpPeripherals
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