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OVPDummyPort



OVP Peripheral Model: OVPDummyPort



Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Description

Dummy peripheral that provides an area for accesses.

Limitations

Has no behavior. This peripheral defines a port through which a 4k byte memory area can be read and written.

Licensing

Open Source Apache 2.0

Reference

This is not based upon a real device

Location

The dummyPort peripheral model is located in an Imperas/OVP installation at the VLNV: ovpworld.org / peripheral / dummyPort / 1.0.



Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table : Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000T (True)


No address blocks have been defined for this slave port.



Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 1: Publicly available platforms using peripheral 'dummyPort'

Platform NameVendor
HeteroArmVersatileExpressLinuxwithMicroBlazeimperas.ovpworld.org
AlteraCycloneV_HPSaltera.ovpworld.org
ArmVersatileExpressarm.ovpworld.org
ArmVersatileExpress-CA15arm.ovpworld.org
ArmVersatileExpress-CA9arm.ovpworld.org
QuadArmVersatileExpressimperas.ovpworld.org
AlteraCycloneV_HPS_TLM2altera.ovpworld.org
ArmVersatileExpress_CA9_TLM2arm.ovpworld.org
FreescaleVybridVFxxfreescale.ovpworld.org
ArmVersatileExpress-CA15arm.ovpworld.org
ArmVersatileExpress-CA9arm.ovpworld.org
Zynq_PSxilinx.ovpworld.org



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