OVP Peripheral Model: OvpTrap
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Description
Open a port and allocate a region that is defined by parameters.
The region can be configured to act as standard memory or can report read/write accesses.
Licensing
Open Source Apache 2.0
Limitations
This peripheral cannot be used in a hardware description used to generate a TLM platform.
Reference
This is not based upon the operation of a real device but is intended to be used for bring up and development of new virtual platforms.
Location
The trap peripheral model is located in an Imperas/OVP installation at the VLNV: ovpworld.org / peripheral / trap / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
portAddress | uns32 | Defines the memory address at which the port is connected. |
portSize | uns32 | Defines the size, in bytes, of the port (Default 0x1000). |
cbEnable | bool | Defines the behaviour on an access. The default operation provides a memory area. If this parameter is set all accesses are reported. |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: bport1
Table 1: Bus Slave Port: bport1
Name | Size (bytes) | Must Be Connected | Description |
---|
bport1 | 0x1 | T (True) | |
No address blocks have been defined for this slave port.
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 2: Publicly available platforms using peripheral 'trap'