OVP Peripheral Model: RenesasTms
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Licensing
Open Source Apache 2.0
Description
Renesas TMS Timer/Event Counter S
Limitations
Status of Modes - Interval Timer Mode - Supported - External Event Count Mode - Untested - External Trigger Pulse Output Mode - Unsupported - One-Shot Pulse Mode - Unsupported - PWM Mode - Unsupported - Free-Running Mode - Supported - Triangular-Wave PWM Mode - Unsupported - High Accuracy T-PWM Mode - Unsupported - PWM Mode with Dead Time - Unsupported - 120Deg Excitation Mode - Unsupported - Special 120Deg Excitation Mode - Unsupported - Special Pattern Output Mode - Unsupported
Reference
R01UH0128ED0700, Rev. 7.00, Oct 06, 2010
Location
The tms peripheral model is located in an Imperas/OVP installation at the VLNV: renesas.ovpworld.org / peripheral / tms / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
PCLK0 | uns32 | |
PCLK1 | uns32 | |
PCLK2 | uns32 | |
PCLK3 | uns32 | |
PCLK4 | uns32 | |
PCLK5 | uns32 | |
PCLK7 | uns32 | |
PCLK9 | uns32 | |
PCLK_DEF | uns32 | |
PARAM_01 | uns32 | |
Net Ports
This model has the following net ports:
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|
TOS0 | output | F (False) | |
TOS1 | output | F (False) | |
TOS2 | output | F (False) | |
TOS3 | output | F (False) | |
TOS4 | output | F (False) | |
TOS5 | output | F (False) | |
TOS6 | output | F (False) | |
TOS7 | output | F (False) | |
TSADTRG0 | output | F (False) | |
TSADTRG1 | output | F (False) | |
TSAEDO | output | F (False) | |
TSESG | output | F (False) | |
TSTSF | output | F (False) | |
INTTSCC0 | output | F (False) | |
INTTSCC1 | output | F (False) | |
INTTSCC2 | output | F (False) | |
INTTSCC3 | output | F (False) | |
INTTSCC4 | output | F (False) | |
INTTSCC5 | output | F (False) | |
INTTSCD0 | output | F (False) | |
INTTSOD | output | F (False) | |
INTTSOV | output | F (False) | |
INTTSER | output | F (False) | |
INTTSWN | output | F (False) | |
TTRGS | input | F (False) | |
TEVTS | input | F (False) | |
TAPTS0 | input | F (False) | |
TAPTS1 | input | F (False) | |
TAPTS2 | input | F (False) | |
ESO | input | F (False) | |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: TMSP0
Table 2: Bus Slave Port: TMSP0
Name | Size (bytes) | Must Be Connected | Description |
---|
TMSP0 | 0x2a | F (False) | |
Table 3: Bus Slave Port: TMSP0 Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|
reg0_CTL0 | 0x0 | 8 | | | |
reg0_CTL1 | 0x1 | 8 | | | |
reg1_IOC0 | 0x2 | 16 | | | |
reg2_IOC2 | 0x4 | 8 | | | |
reg2_IOC4 | 0x5 | 8 | | | |
reg2_OPT0 | 0x6 | 8 | | | |
reg2_OPT4 | 0x8 | 8 | | | |
reg2_OPT5 | 0x9 | 8 | | | |
reg2_OPT7 | 0x7 | 8 | | | |
reg3_OPT1 | 0xa | 16 | | | |
reg3_OPT2 | 0x20 | 16 | | | |
reg3_OPT3 | 0x22 | 16 | | | |
reg3_OPT6 | 0x24 | 16 | | | |
reg3_DTC0 | 0xe | 16 | | | |
reg3_DTC1 | 0xc | 16 | | | |
reg3_PAT0 | 0x16 | 16 | | | |
reg3_PAT1 | 0x14 | 16 | | | |
reg3_CCR0 | 0x18 | 16 | | | |
reg3_CCR1 | 0x1e | 16 | | | |
reg3_CCR2 | 0x1c | 16 | | | |
reg3_CCR3 | 0x1a | 16 | | | |
reg3_CCR4 | 0x12 | 16 | | | |
reg3_CCR5 | 0x10 | 16 | | | |
reg3_CNT | 0x26 | 16 | | | |
reg3_SBC | 0x28 | 16 | | | |
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 4: Publicly available platforms using peripheral 'tms'