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Sparc V8 Processor Model SparcV8
An OVP Sparc V8 model was created by Heng Ye at Southampton University as part of the work towards a degree of MSc in Systems On Chip. This was written up in a dissertation "SPARC V8 Processor Modelling and Simulation by Open Virtual Platforms".
This model is not a complete model of the Sparc V8 architecture but models the majority of instructions from the ISA.
Component Description for SparcV8/sparc.igen.xml
PROCESSOR | sparc |
ELFCODE | 2 |
ENDIAN | big |
FAMILY | SPARC International |
IMAGEFILE | model |
LIBRARY | processor |
PROCDOC | $IMPERAS_HOME/ImperasLib/source/soton.ac.uk/processor/sparc/1.0/doc/OVP_Model_Specific_Information_sparc_generic.pdf |
RELEASESTATUS | 2 |
USEINDEFAULTPLATFORM | T |
VENDOR | soton.ac.uk |
VERSION | 1.0 |
VISIBILITY | 0 |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | Sparc V8 processor model. |
DOCSECTION | doc_1 |
TEXT | Licensing |
DOCTEXT | txt |
TEXT | Open Source Apache 2.0 |
DOCSECTION | doc_2 |
TEXT | Limitations |
DOCTEXT | txt |
TEXT | Core instruction set only. Incomplete and not fully verified. |
DOCSECTION | doc_3 |
TEXT | Source |
DOCTEXT | txt |
TEXT | Source can be obtained from the OVPworld.org website under Processors / SparcV8 |
FORMALATTRIBUTE | variant |
TYPE | enumeration |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | Processor variant |
ENUM | sparc |
VALUE | 0 |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | Single default variant |
BUSMASTERPORT | INSTRUCTION |
ADDRESSWIDTH | 32 |
ADDRESSWIDTHMAX | 32 |
ADDRESSWIDTHMIN | 32 |
MUSTBECONNECTED | T |
BUSMASTERPORT | DATA |
ADDRESSWIDTH | 32 |
ADDRESSWIDTHMAX | 32 |
ADDRESSWIDTHMIN | 32 |
MUSTBECONNECTED | F |
COMMAND | isync |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | specify instruction address range for synchronous execution |
COMMANDARG | addresshi |
TYPE | Uns64 |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | end address of synchronous execution range |
COMMANDARG | addresslo |
TYPE | Uns64 |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | start address of synchronous execution range |
COMMAND | itrace |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | enable or disable instruction tracing |
COMMANDARG | access |
TYPE | String |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | show memory accesses by this instruction. Argument can be any combination of X (execute), A (load or store access) and S (system) |
COMMANDARG | after |
TYPE | Uns64 |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | apply after this many instructions |
COMMANDARG | enable |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | enable instruction tracing |
COMMANDARG | full |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | turn on all trace features |
COMMANDARG | instructioncount |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | include the instruction number in each trace |
COMMANDARG | memory |
TYPE | String |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | (Alias for access). show memory accesses by this instruction. Argument can be any combination of X (execute), A (load or store access) and S (system) |
COMMANDARG | mode |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | show processor mode changes |
COMMANDARG | off |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | disable instruction tracing |
COMMANDARG | on |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | enable instruction tracing |
COMMANDARG | processorname |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | Include processor name in all trace lines |
COMMANDARG | registerchange |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | show registers changed by this instruction |
COMMANDARG | registers |
TYPE | Boolean |
DOCSECTION | doc |
TEXT | Description |
DOCTEXT | txt |
TEXT | show registers after each trace |
FILEVERSION | _version_0 |
MAJOR | 1 |
MINOR | 0 |
CategoryProcessor SouthamptonUniversity
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