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XilinxAxiGpio



OVP Peripheral Model: XilinxAxiGpio



Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Description

Xilinx AXI General Purpose IO

Licensing

Open Source Apache 2.0

Limitations

This model implements the AXI GPIO

Reference

pg144-axi-gpio Vivado Design Suite October 5, 2016

Location

The axi-gpio peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / axi-gpio / 1.0.



Peripheral Instance Parameters

This model accepts the following parameters:

Table : Peripheral Parameters

NameTypeDescription
endianstring
gpiowidthuns32
gpio2widthuns32
initgpiotriuns32
initgpio2triuns32
initgpiodatauns32
initgpio2datauns32
dualchannelbool



Net Ports

This model has the following net ports:

Table 1: Net Ports

NameTypeMust Be ConnectedDescription
gpio_outoutputF (False)
gpio_ininputF (False)
gpio2_outoutputF (False)
gpio2_ininputF (False)



Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: sp1

Table 2: Bus Slave Port: sp1

NameSize (bytes)Must Be ConnectedDescription
sp10x200T (True)

Table 3: Bus Slave Port: sp1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile
reg_gpio_tri0x432
reg_gpio2_tri0xc32
reg_gier0x11c32
reg_ip_ier0x12832
reg_ip_isr0x12032



Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 4: Publicly available platforms using peripheral 'axi-gpio'

Platform NameVendor
Zynq_PL_NostrumNoCsafepower.ovpworld.org
Zynq_PL_NostrumNoC_nodesafepower.ovpworld.org



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