OVP Peripheral Model: XilinxAxiGpio
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Description
Xilinx AXI General Purpose IO
Licensing
Open Source Apache 2.0
Limitations
This model implements the AXI GPIO
Reference
pg144-axi-gpio Vivado Design Suite October 5, 2016
Location
The axi-gpio peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / axi-gpio / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
endian | string | |
gpiowidth | uns32 | |
gpio2width | uns32 | |
initgpiotri | uns32 | |
initgpio2tri | uns32 | |
initgpiodata | uns32 | |
initgpio2data | uns32 | |
dualchannel | bool | |
Net Ports
This model has the following net ports:
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|
gpio_out | output | F (False) | |
gpio_in | input | F (False) | |
gpio2_out | output | F (False) | |
gpio2_in | input | F (False) | |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: sp1
Table 2: Bus Slave Port: sp1
Name | Size (bytes) | Must Be Connected | Description |
---|
sp1 | 0x200 | T (True) | |
Table 3: Bus Slave Port: sp1 Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|
reg_gpio_tri | 0x4 | 32 | | | |
reg_gpio2_tri | 0xc | 32 | | | |
reg_gier | 0x11c | 32 | | | |
reg_ip_ier | 0x128 | 32 | | | |
reg_ip_isr | 0x120 | 32 | | | |
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 4: Publicly available platforms using peripheral 'axi-gpio'