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XilinxLogicoreFit



OVP Peripheral Model: XilinxLogicoreFit



Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.

Description

logiCore Fixed Interval Timer (PG110)

Limitations

Initial verion. Not clock accurate

Licensing

Open Source Apache 2.0

Reference

pg110-fixed-interval-timer November 18, 2015

Location

The logicore-fit peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / logicore-fit / 1.0.



Peripheral Instance Parameters

This model accepts the following parameters:

Table : Peripheral Parameters

NameTypeDescription
C_NO_CLOCKSuns32
C_INACCURACYuns32
CLOCK_RATEuns32The clock rate at which to count (default 100)



Net Ports

This model has the following net ports:

Table 1: Net Ports

NameTypeMust Be ConnectedDescription
RstinputF (False)
InterruptoutputF (False)



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