OVP Peripheral Model: XilinxZynq7000Ttc
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Description
Zynq 7000 Triple Timer Counter Registers
Licensing
Open Source Apache 2.0
Limitations
This model implements the full set of registers and basic behavior. It is not yet completed.
Reference
Zynq-7000 TRM (https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf)
Location
The zynq_7000-ttc peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / zynq_7000-ttc / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
clk1 | uns32 | Timer 1 Clock Rate MHz (default 33MHz) |
clk2 | uns32 | Timer 2 Clock Rate MHz (default 33MHz) |
clk3 | uns32 | Timer 3 Clock Rate MHz (default 33MHz) |
endian | string | Specify the endian of the processor interface (default little endian) |
Net Ports
This model has the following net ports:
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|
int1 | output | F (False) | Interrupt Timer 1 |
int2 | output | F (False) | Interrupt Timer 2 |
int3 | output | F (False) | Interrupt Timer 3 |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: bport1
Table 2: Bus Slave Port: bport1
Name | Size (bytes) | Must Be Connected | Description |
---|
bport1 | 0x1000 | T (True) | |
Table 3: Bus Slave Port: bport1 Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|
ab_Clock_Control_1 | 0x0 | 32 | Clock Control register | | |
ab_Clock_Control_2 | 0x4 | 32 | Clock Control register | | |
ab_Clock_Control_3 | 0x8 | 32 | Clock Control register | | |
ab_Counter_Control_1 | 0xc | 32 | Operational mode and reset | | |
ab_Counter_Control_2 | 0x10 | 32 | Operational mode and reset | | |
ab_Counter_Control_3 | 0x14 | 32 | Operational mode and reset | | |
ab_Counter_Value_1 | 0x18 | 32 | Current counter value | | |
ab_Counter_Value_2 | 0x1c | 32 | Current counter value | | |
ab_Counter_Value_3 | 0x20 | 32 | Current counter value | | |
ab_Interval_Counter_1 | 0x24 | 32 | Interval value | | |
ab_Interval_Counter_2 | 0x28 | 32 | Interval value | | |
ab_Interval_Counter_3 | 0x2c | 32 | Interval value | | |
ab_Match_1_Counter_1 | 0x30 | 32 | Match value | | |
ab_Match_1_Counter_2 | 0x34 | 32 | Match value | | |
ab_Match_1_Counter_3 | 0x38 | 32 | Match value | | |
ab_Match_2_Counter_1 | 0x3c | 32 | Match value | | |
ab_Match_2_Counter_2 | 0x40 | 32 | Match value | | |
ab_Match_2_Counter_3 | 0x44 | 32 | Match value | | |
ab_Match_3_Counter_1 | 0x48 | 32 | Match value | | |
ab_Match_3_Counter_2 | 0x4c | 32 | Match value | | |
ab_Match_3_Counter_3 | 0x50 | 32 | Match value | | |
ab_Interrupt_Register_1 | 0x54 | 32 | Counter 1 Interval, Match, Overflow and Event interrupts | | |
ab_Interrupt_Register_2 | 0x58 | 32 | Counter 2 Interval, Match, Overflow and Event interrupts | | |
ab_Interrupt_Register_3 | 0x5c | 32 | Counter 3 Interval, Match, Overflow and Event interrupts | | |
ab_Interrupt_Enable_1 | 0x60 | 32 | ANDed with corresponding Interrupt Register | | |
ab_Interrupt_Enable_2 | 0x64 | 32 | ANDed with corresponding Interrupt Register | | |
ab_Interrupt_Enable_3 | 0x68 | 32 | ANDed with corresponding Interrupt Register | | |
ab_Event_Control_Timer_1 | 0x6c | 32 | Enable, pulse and overflow | | |
ab_Event_Control_Timer_2 | 0x70 | 32 | Enable, pulse and overflow | | |
ab_Event_Control_Timer_3 | 0x74 | 32 | Enable, pulse and overflow | | |
ab_Event_Register_1 | 0x78 | 32 | pclk cycle count for event | | |
ab_Event_Register_2 | 0x7c | 32 | pclk cycle count for event | | |
ab_Event_Register_3 | 0x80 | 32 | pclk cycle count for event | | |
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 4: Publicly available platforms using peripheral 'zynq_7000-ttc'