| Type | Instance | Vendor | Component | |
|---|---|---|---|---|
| Bus | extPortBus | (builtin) | address width:32 |
LIBRARY | COMPANIES | PLATFORMS | PROCESSORS | PERIPHERALS
ZynqPLDefault
XilinxPlatforms
Revision [196216]
The oldest known version of this page was edited on 2022-07-28 16:06:50 by LibraryAdminiStratorOVP Virtual Platform: Zynq_PL_Default
This page provides detailed information about the OVP Virtual Platform Model of the xilinx.ovpworld.org Zynq_PL_Default platform.Licensing
Open Source Apache 2.0Description
This module implements a default of the Xilinx Zynq Programmable Logic (PL). This PL configuration instances no devices or memory.Limitations
The is baremetal only.Reference
No ReferenceLocation
The Zynq_PL_Default virtual platform is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / module / Zynq_PL_Default / 1.0.Platform Summary
Table : Components in platform
Platform Simulation Attributes
Table 1: Platform Simulation Attributes
| Attribute | Value | Description |
|---|---|---|
| stoponctrlc | stoponctrlc | Stop on control-C |
External Ports for Module Zynq_PL_Default
Table 2: External Ports
| Port Type | Port Name | Internal Connection |
|---|---|---|
| busport | extPort | extPortBus |
| netport | gpio_bank2_outP | gpio_bank2_out |
| netport | gpio_bank2_oen_outP | gpio_bank2_oen_out |
| netport | gpio_bank2_inP | gpio_bank2_in |
| netport | gpio_bank3_outP | gpio_bank3_out |
| netport | gpio_bank3_oen_outP | gpio_bank3_oen_out |
| netport | gpio_bank3_inP | gpio_bank3_in |
| netport | irqf2p0_outP | irqf2p0 |
| netport | irqf2p1_outP | irqf2p1 |
| netport | irqf2p2_outP | irqf2p2 |
| netport | irqf2p3_outP | irqf2p3 |
| netport | irqf2p4_outP | irqf2p4 |
| netport | irqf2p5_outP | irqf2p5 |
| netport | irqf2p6_outP | irqf2p6 |
| netport | irqf2p7_outP | irqf2p7 |
| netport | irqf2p8_outP | irqf2p8 |
| netport | irqf2p9_outP | irqf2p9 |
| netport | irqf2p10_outP | irqf2p10 |
| netport | irqf2p11_outP | irqf2p11 |
| netport | irqf2p12_outP | irqf2p12 |
| netport | irqf2p13_outP | irqf2p13 |
| netport | irqf2p14_outP | irqf2p14 |
| netport | irqf2p15_outP | irqf2p15 |
| netport | irqf2p16_outP | irqf2p16 |
| netport | irqf2p17_outP | irqf2p17 |
| netport | irqf2p18_outP | irqf2p18 |
| netport | irqf2p19_outP | irqf2p19 |
| netport | irqp2f0_inP | irqp2f0 |
| netport | irqp2f1_inP | irqp2f1 |
| netport | irqp2f2_inP | irqp2f2 |
| netport | irqp2f3_inP | irqp2f3 |
| netport | irqp2f4_inP | irqp2f4 |
| netport | irqp2f5_inP | irqp2f5 |
| netport | irqp2f6_inP | irqp2f6 |
| netport | irqp2f7_inP | irqp2f7 |
| netport | irqp2f8_inP | irqp2f8 |
| netport | irqp2f9_inP | irqp2f9 |
| netport | irqp2f10_inP | irqp2f10 |
| netport | irqp2f11_inP | irqp2f11 |
| netport | irqp2f12_inP | irqp2f12 |
| netport | irqp2f13_inP | irqp2f13 |
| netport | irqp2f14_inP | irqp2f14 |
| netport | irqp2f15_inP | irqp2f15 |
| netport | irqp2f16_inP | irqp2f16 |
| netport | irqp2f17_inP | irqp2f17 |
| netport | irqp2f18_inP | irqp2f18 |
| netport | irqp2f19_inP | irqp2f19 |
| netport | irqp2f20_inP | irqp2f20 |
| netport | irqp2f21_inP | irqp2f21 |
| netport | irqp2f22_inP | irqp2f22 |
| netport | irqp2f23_inP | irqp2f23 |
| netport | irqp2f24_inP | irqp2f24 |
| netport | irqp2f25_inP | irqp2f25 |
| netport | irqp2f26_inP | irqp2f26 |
| netport | irqp2f27_inP | irqp2f27 |
| netport | irqp2f28_inP | irqp2f28 |
XilinxPlatforms
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