MIPS Announces new Processor Cores - Imperas supports release

MIPS Technologies Introduces New Processor Cores with 32-bit Performance and near 16-bit Code Size
M14K™ and M14Kc™ Cores Combine High Performance, Compact Area and Low Power for Microcontroller and Low-Footprint Embedded Applications

SUNNYVALE, Calif. - November 2, 2009 - MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores, today introduced a new core family providing the highest levels of system performance for extremely cost-sensitive embedded applications such as 32-bit microcontrollers (MCUs), home entertainment, personal entertainment and home networking. The new MIPS32® M14KTM and M14KcTM cores are the first MIPS32-compatible cores that also execute the new microMIPSTM instruction set architecture (ISA), achieving high performance of
1.5 DMIPS/MHz with an advanced level of code compression. The microMIPS ISA maintains 98% of MIPS32 performance while reducing code size by 35%, translating to significant ...

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Software developers can also take advantage of fast instruction set simulators developed in conjunction with Imperas for use in software development and virtual platforms.
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"We are working together with MIPS to create MIPS-VerifiedTM instruction-accurate models of its newest cores that MIPS will provide to its licensees," said Simon Davidmann, CEO of Imperas. "With our instruction accurate simulation technology and these models, developers can simulate complete embedded systems running real application code at very fast speeds on typical desktop PCs-helping them get to market quickly at the lowest possible cost."
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For full text of the release, please read the release on the MIPS site.