New release includes MIPS-Based SystemC TLM-2.0 Reference Platform

THAME, United Kingdom, June 22, 2010 – Imperas, which through the Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has become the de facto source for instruction accurate processor modeling and simulation, today announced a major release of new technology. Highlights of this June 2010 release are the virtual platform simulator OVPsim, which has improved its industry leading performance by 50 percent; fast models of PowerPC processors, and a MIPS-based reference platform under SystemC/TLM-2.0 which boots both Linux and Mentor Graphic’s Nucleus RTOS.

OVPsim, which for basic instruction set simulation of processors achieves over 2 billion instructions per second (or over 2,000 MIPS), achieves hundreds of MIPS performance for real world virtual platforms. ARM and MIPS-based virtual platforms can boot Linux in less than 5 seconds on a 2GHz laptop with OVPsim.

“Virtual platforms are providing significant benefits to our software team, as they make it easier to maintain existing software and develop new applications for existing avionics systems” said Dan Radke, USAF, 559th Software Maintenance Squadron. “Key attributes of virtual platforms are realizing far greater speed of software simulation, especially for multiprocessor systems, having more standard approaches to develop models to, and being able to use open source models of processors and peripherals already available, making it easier for us to build our own efficient models of complete avionics systems.”

The addition of the models of the PowerPC cores brings OVP to nearly 50 different models of processor cores, all running at very high speed, and all working with both the OVP and Imperas simulators. All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms, such as OS and CPU-aware tracing, profiling code analysis, and multicore debug.

“The first questions from our customers are always about simulation speed and model availability,” said Umesh Sisodia, founder and CEO of CircuitSutra. “Even before this release, OVP made it easy to answer those questions, but these additions to OVP for simulation speed, additional models and the TLM-2.0 reference virtual platform make OVP even easier to use and adopt.”

Reference virtual platforms provide a known good starting point for users looking to develop their own virtual platforms. OVP has released a reference virtual platform of the MIPS Malta board, running under SystemC/TLM-2.0, that boots either Linux or the Mentor Graphics Nucleus RTOS. This virtual platform can be used to understand the operating systems, since the virtual platform simulation can provide more visibility and controllability than just executing and debugging on the hardware itself. The virtual platform can also be used for the development of applications running under Linux or Nucleus on a MIPS-based system. Moreover, the virtual platform is open source, and it’s easy to add peripherals to the virtual platform using SystemC/TLM-2.0 models and develop drivers for those peripherals.

“Our licensees are focused on speeding time-to-market and extracting the highest possible performance from their SoCs,” said Art Swift, vice president of marketing for MIPS Technologies. “Virtual platforms give users a head start in the development cycle. Having a virtual platform of a common development board running at real time speeds can potentially shave weeks or months off of a typical development cycle.”

“We founded OVP 2 years ago to provide the infrastructure technology – simulation and models – to the embedded software community,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Over this time we’ve seen the community – users, tool developers, processor IP vendors, service providers, academia – come together around OVP to help them with embedded software development. We’re proud and excited to be part of this industry momentum, and to continue to contribute to OVP.”

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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Open Source Models Available Now for Free on OVP Website

THAME, United Kingdom, June 8, 2010 – Imperas, which through the Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has become the de facto source for instruction accurate processor modeling and simulation, today announced the release of fast models of PowerPC processors. These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance reaching over one thousand million instructions per second (MIPS). The models are free and available as open source from the OVP website.

The addition of the models of the PowerPC cores brings OVP to nearly 50 different models of processor cores, all running at very high speed, and all working with both the OVP and Imperas simulators. All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms, such as OS and CPU-aware tracing, profiling code analysis, and multicore debug.

“The Power Architecture is an important embedded processor family,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Users have been asking for fast models of the PowerPC processor cores, and we’re now able to deliver these models, open source and free, through Open Virtual Platforms. This is just a continuation of the momentum in the OVP initiative.”

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.
Fast Instruction accurate models are available from the OVP website for MIPS, ARM, Virage ARC, NEC v850, Power Architecture, OpenCores, SPARC and other processor families.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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Mentor Graphics Nucleus RTOS Running on ARM and MIPS-Based Free Reference Platforms Available Through Open Virtual Platforms (OVP)

THAME, United Kingdom, May 24, 2010 – Imperas today announced a flow with Mentor Graphics Corporation (Nasdaq: MENT) focused on enabling more productive and higher quality embedded software development with the Mentor Graphics® Nucleus Real-Time Operating System (RTOS) and the Mentor Embedded™ software tools. With firmware and application software development taking the majority of the resources for developing embedded, creating new flows for embedded software is increasingly important. The Imperas flow with Mentor Graphics Embedded Software Division (ESD) tools, including the Mentor Nucleus RTOS and EDGE products, makes it easier to use the Open Virtual Platforms (OVP) open source models for the development of embedded systems.

The initial result of this flow is the release of free reference virtual platforms by Imperas based on ARM and MIPS processor cores, running the Mentor Nucleus RTOS. These reference virtual platforms are available from the Open Virtual Platforms (OVP) website, www.OVPworld.org/Nucleus. The reference virtual platforms constructed from OVP open source models make it easy for embedded systems developers to use these platforms as a starting point for building their own virtual platforms. A compiled version of the Mentor Nucleus RTOS running on the reference platforms is available for demonstration. Developers interested in using the Nucleus product will need to get a license from Mentor.

“Embedded software is the key differentiator for today’s products and we need to make it easier for people to develop embedded systems,” said Glenn Perry, general manager of Mentor Graphics Embedded Software Division. “Virtual platforms are one way to accelerate software development, and we are excited that Imperas has provided a flow that enables users to run Nucleus RTOS and EDGE on OVP reference platforms.”

A virtual platform is a set of models and a simulation engine that enables the same software binaries that would run on the hardware to be executed on a software, or virtual, platform. Because instruction-accurate models do not require the full implementation details of the hardware, they can be more easily and quickly developed, enabling software development to start months before any hardware is available. In addition, software development on virtual platforms offers the benefit of simulation of any system: full visibility and controllability, unlike the limited access that hardware provides as a software development environment. Further benefits of virtual platforms include real-time simulation speed of hundreds of millions of instructions per second, and deterministic behavior, enabling simulation runs to be repeated.

“Just as we cannot imagine developing hardware without using simulation, software simulation, or virtual platforms, are moving into the mainstream of embedded software development for SoCs (systems on chips),” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Making it easier to get started with virtual platforms by releasing reference platforms with the most popular operating systems such as Nucleus RTOS provides great value to the OVP and embedded systems communities.”

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

Mentor Graphics and Nucleus are registered trademarks and Mentor Embedded is a trademark of Mentor Graphics Corporation. MIPS, Malta and MIPS-Based are trademarks or registered trademarks in the United States and other countries of MIPS Technologies, Inc. Imperas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

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Fast Models Developed Under MIPS-Verified™ Program

THAME, United Kingdom, March 31, 2010 – Imperas today released models of the new MIPS32® M14K™ and M14Kc™ processor cores from MIPS Technologies, Inc., including example virtual platforms utilizing these cores and support for the cores in Imperas’ advanced software development tools. The M14K family of processors is the first to support the new microMIPSTM code compression instruction set architecture (ISA) from MIPS Technologies, which is fully supported in the Imperas models. MIPS Technologies has verified the functionality of these models under the MIPS-Verified™ program.

The processor core models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/MIPS/M14K. The models of the MIPS® processor cores, as well as models of the other MIPS processors, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

“The M14K cores and the microMIPS ISA represent groundbreaking technology for microcontrollers and other low footprint embedded applications, where performance requirements together with cost and silicon size limitations are driving our customers,” said Sandeep Vij, president and CEO, MIPS Technologies. “Having MIPS-Verified support from Imperas and OVP, the leading independent supplier of fast models of processor cores, enables our customers to get started immediately with designs leveraging M14K cores.”

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models. The OVP simulator also has an Eclipse IDE integration, enabling easy use for software developers. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.

“Complex systems and performance and quality requirements demand that developers have state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP was founded to enable users to have fast simulation and other tools for software development, thus accelerating the development cycle.”

OVP offers MIPS developers access to the M14K models, as well as access to models of other MIPS processors, including the MIPS32 4K®, 24K®, 34K®, 74K® and 1004K™ families of cores. OVP also has reference virtual platforms incorporating the MIPS cores, including bare metal platforms and a virtual platform of the MIPS Malta™ development board. This Malta virtual platform enables users to boot Linux in under 5 seconds on a 2GHz laptop using OVPsim. These reference platforms are all available as source code, and are easily modified to add or change the memory and peripheral components to customize the platform as required for software development.

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

MIPS, MIPS32, M14K, M14Kc, 4K, 24K, 34K, 74K, 1004K, Malta and MIPS-Based are trademarks or registered trademarks in the United States and other countries of MIPS Technologies, Inc. Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.
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OVP Continues to Build Momentum as the De Facto Source of Fast Processor Models

THAME, United Kingdom, March 23, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has announced the release of models of Virage Logic’s ARC processor cores. Models of the Virage Logic ARC® 600 and ARC® 700 families of processor cores have been released, including the ARC® 605. Additionally, Virage Logic and Imperas have cooperated on the verification of the functionality of the models. Virage Logic’s ARC line of processor cores, the world’s second most widely used processor architecture, are commonly used in audio and video subsystems, and in flash controllers, among other applications. These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance reaching hundreds of millions of instructions per second. The models are free and available as open source from the OVP website.

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.

“Imperas is moving the embedded systems industry forward with its visionary approach to virtual platforms and the easy accessibility of OVP,” said Dr. Yankin Tanurhan, vice president and general manager, processor and NVM solutions, for Virage Logic. “Verifying the compatibility and functionality of these high-performance models of our ARC processors and making them freely available is a huge advantage for design teams worldwide. This availability will help enable them to develop high-quality software faster and more easily using virtual platform models of their complete SoCs and embedded systems.”

“As the semiconductor industry’s trusted IP partner, Virage Logic recognizes the importance of freely available models to enable rapid growth and accelerate the design and programming of embedded systems on chip,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Compatibility and quality of models is essential when using virtual platforms to develop software. Offering free, verified processor models means developers can get higher quality software developed faster and help close the software gap.”

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

# # #

ARM Integrator Virtual Platform Speeds Embedded Software Development

THAME, United Kingdom, February 22, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has announced the release of a reference virtual platform of the ARM Integrator development board using OSCI SystemC TLM-2.0 C++. This virtual platform includes all the models needed for the virtual platform to enable users to run Linux. The virtual platform can be executed either in the OVP simulator (OVPsim), or in a SystemC/TLM-2.0 simulation environment using any of the industry SystemC/TLM-2.0 simulators. The virtual platform and all models are free and available as open source from the OVP website.

“We have used the ARM Integrator virtual platform available from OVP to help our customers understand how Linux and drivers worked on their hardware,” said Dave Von Bank, president of Posedge Software, a consulting company for embedded software engineering. “We’re happy to use and contribute to the OVP open source initiative for embedded software development.”

The OVP ARM Integrator virtual platform can be used to understand the Linux operating system running on the development board, since the virtual platform simulation can provide more visibility and controllability than just executing and debugging on the hardware itself. The virtual platform can also be used for the development of applications running under Linux on an ARM-based system. Moreover, the virtual platform is open source, and it’s easy to add peripherals to the virtual platform using SystemC/TLM-2.0 models and develop drivers for those peripherals.

“For my course on System-on-Chip (SoC) Design, students learn about both hardware and software development aspects,” said Professor Andreas Gerstlauer of the Electrical and Computer Engineering Department at the University of Texas at Austin. “We eventually implement a software defined radio design on an ARM-based FPGA prototyping board. I have found the Open Virtual Platforms models allow my students to simulate the software, from drivers to applications running on top of the Linux OS. We use the OVP models in a SystemC/TLM-2.0 simulation environment, and find them fast and easy to use. That the models are open source and come with excellent documentation and support is an added benefit.”

“Virtual platforms make software development easier and more efficient,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “It’s great that students and software developers can have free access to use models that run at real-time speeds in industry standard simulation environments.”

The ARM Integrator virtual platform includes the OVP model of the ARM926EJ-S processor core, which runs at hundreds of millions of instructions per second (MIPS), as well as models of the other peripherals on the ARM Integrator development board. The virtual platform utilizes host workstation resources for keyboard and display. This virtual platform can be run in either OVPsim or SystemC/TLM-2.0 simulators, and in either simulation environment boots Linux in less than 10 seconds.

Open Virtual Platforms (www.OVPworld.org)
OVP, which is quickly becoming the de facto source for fast models of processors, includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from models of individual processors (over 40 available for ARC, ARM, MIPS, NEC and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2,100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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Models of MIPS™ 74K™ Processor and 1004K™ Multicore Processor Developed Under MIPS-Verified™ Program

THAME, United Kingdom, February 17, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org), has released new models of MIPS Technologies, Inc. processor cores and continues its move to becoming the de facto source of fast models. The MIPS 74K and 1004K processors are the most advanced cores from MIPS, with the 1004K being a multi-core, multi-threaded processor, with up to 4 cores and 2 threads per core. MIPS has verified the functionality of these models under the MIPS-Verified program. These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance of hundreds of millions of instructions per second.

Embedded software complexity is increasing rapidly, especially with multicore and multi-threaded processors like the MIPS 1004K being utilized for embedded systems. This complexity, and associated problems with software schedules and bugs, drives users to start development earlier in the project. Early simulation of software with OVP technology provides benefits of both increased productivity and increased quality.

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, the tools they need for a more robust development environment. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.

“Bringing simulation to software development is a natural step to an earlier start to software development, and better debugging and analysis of multicore software. Bringing low cost simulation tools and free, fast models of state of the art processors such as the MIPS 74K and 1004K is why we founded Open Virtual Platforms.,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP now has the full range of MIPS32 cores available as fast models. OVP is rapidly becoming the de facto place to source fast models.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor models (from ARC, ARM, MIPS and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation, by Imperas, of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.
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OVP Quickly Becoming the De Facto Source of Fast Processor Models

THAME, United Kingdom, February 17, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has also announced the release of new models of NEC processor cores. The NEC v850 series of processor cores, including the base instruction set as well as the E1 and E2 additions, is a workhorse in the embedded systems market, most commonly used in automotive and other applications.

“In the automotive electronics industry we always need to do more testing of our embedded systems software,” said Urban Forssell, CEO of NIRA Dynamics AB, a subsidiary of Audi Electronics Venture GmbH. “Finding that the simulation performance of the Imperas/OVP NEC model was 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability,”

“For the last 20 years we wouldn’t dream of building an integrated circuit without simulating the hardware,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Bringing simulation to software development is a natural step. Bringing low cost simulation tools and free, fast models of state of the art processors such as the NEC v850 is why we founded Open Virtual Platforms. With over 40 processor models available, OVP is quickly becoming the de facto source of fast models.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from models of individual processors (over 40 available from ARC, ARM, MIPS, NEC and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. All OVP processor models include a SystemC/TLM-2.0 interface for easy integration in those virtual platform environments. OVP APIs enable the embedded software community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged. Since its founding in early 2008, over 2,100 people have registered on the OVP website.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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OVP Becomes Founding Member of Synopsys System-Level Catalyst Program

THAME, United Kingdom, October 8, 2009– The Open Virtual Platforms (OVP) initiative (www.OVPworld.org), founded by Imperas and now boasting more than 1,500 individuals from the embedded systems community registered on the website, has released new models of ARM processor cores. These models work with the OVP simulator, OVPsim, and have exceptionally fast performance of hundreds of millions of instructions per second (MIPS). Additionally, OVP became a founding member of the Synopsys System-Level Catalyst Program. OVP technology provides solutions to the problems embedded software developers incur when modeling the multi-processor system on chip (MPSoC) that hosts their software.

The ARM models released are for the v4 and v5 instruction sets from ARM, supporting 13 processor cores across the ARM7, ARM9 and ARM10 families of processor cores. This includes the ARM926E processor core, the most popular core developed by ARM. These models are instruction accurate, typically enabling simulation speeds of hundreds of MIPS, thus meeting the requirements of application and firmware engineers for their development environments. In addition to working in OVP virtual platforms, the models include SystemC/TLM-2.0 interfaces, enabling native operation in SystemC environments.

“In the automotive electronics industry we always need to do more testing of our embedded systems software. Finding that the simulation performance of the Imperas/OVP ARM model was over 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability,” said Urban Forssell, CEO of Nira Dynamics AB, a subsidiary of Audi Electronics Venture GmbH.

As the complexity of software running on MPSoCs increases, the need for a cost effective virtualized software development environment has become critical. “Open Virtual Platforms provides needed modeling and simulation tools for next generation embedded systems software development,” stated Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “The models of the ARM processor cores give OVP users needed models. Also, working with Synopsys as a founding member of the System-Level Catalyst Program ensures interoperability with the popular Synopsys system-level tools, the DesignWare® System-Level Library of models, and virtual platforms using the Innovator development environment.”

“The goals of the Synopsys System-Level Catalyst Program are to increase model availability and tool interoperability with both the Synopsys Innovator virtual platform development environment and the DesignWare® System-Level Library of TLM-2.0 models, enabling developers to do more work at the system level,” said Frank Schirrmeister, product marketing director for the Solutions Group at Synopsys. “Open Virtual Platforms’ models support of TLM-2.0 further confirms the quality of OSCI’s transaction-level APIs and provides users with more model options, strengthening the overall system-level ecosystem.”

Gert-Jan Tromp, senior consultant at Dizain-Sync B.V., said that “We were excited to have achieved over 500 MIPS performance for an ARM 7 virtual platform benchmark using OVPsim. We were similarly excited at how easy it was to use OVP processor models in a TLM-2.0 virtual platform.”

In addition to making the models for ARM processors available as free and open source, OVP offers free, open source example virtual platforms for OVP users to download from the OVP website. These example platforms include bare metal applications, the Atmel AT91SAM7 product with the ARM7TDMI core running the uClinux operating system, and the ARM IntegratorCP platform with the ARM926EJ-S core, which boots the Linux operating system in less than 10 seconds. “Key tasks for embedded software developers include porting operating systems and drivers to new platforms, and developing new applications to run on the SoCs,” commented Davidmann. “Fast simulation and easy development of platforms is necessary for these complex systems.”

Open Virtual Platforms (www.OVPworld.org)
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor models (from ARC, ARM, MIPS and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. OVP APIs enable the community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services. Synopsys and DesignWare are registered trademarks of Synopsys, Inc.

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OVP Movement Gaining Momentum with Widespread Industry Support: Hundreds of Users, Thousands of Downloads, 16 New Processor Models, and Linux Support

THAME, United Kingdom, June 22, 2009– The Open Virtual Platform (OVP) initiative (www.OVPworld.org), founded by Imperas with the help of 18 companies and individuals from the embedded systems user community, processor intellectual property developers, electronic design automation, service providers and academia, has celebrated its one year anniversary. OVP technology provides solutions to the problems embedded software developers incur when modeling the multi-core system on chip (MPSoC) that hosts their software. Imperas reported that more than 1,200 individuals have registered on the OVP website (www.ovpworld.org) with more than 8,000 downloads of models and tools.

As demand for Multi-Core platforms and MPSoCs increases the need for a suitable, cost effective virtualized software development environment has become critical. “We recognized the weaknesses inherent in the current development environments for software running on multi-core parallel platforms and MPSoCs and the success and support of the OVP initiative has been phenomenal ,” stated Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “We launched OVP a year ago to provide that infrastructure – free open source models and infrastructure focused on multi-core and speed – for simulating the platforms used for embedded software development. Our open virtual platforms provide a vehicle for embedded software developers, deliver complete transparency and control over the software being developed. Simulation technology is the key.”

Imperas reports that the success of OVP is prompting processor vendors, OS providers and embedded systems companies and others to increase adoption of simulation technology and virtual platforms as key components in their development environments. Nine companies and institutions have already added their support to the original founding companies bringing the OVP membership to 27 companies. These include: Cadence, CriticalBlue, Denali, EVE, Forte, MIPS, SpringSoft, Tensilica, Doulos, PosedgeSoftware, VinChip.

“The ease with which users can utilize OVP to build a virtual platform, then integrate OVPsim with Cadence’s Incisive Software eXtensions product, enables much more rigorous and robust verification of hardware/software interactions.” Said Ran Avinun, Group Marketing Director at Cadence. Avinun continued “System and software developers can now take the same industry leading verification technology and methodology being used on the design of their SoC for verification of the virtual platform before sharing it with application developers, or of the complete application software system.”

“Developing software for complex SoCs demands the use of extremely fast virtual platforms and the success of open virtual platforms is addressing these unique requirements,” commented Davidmann. “The availability of fast, vendor certified processor models and the growing library of open source components and platforms demonstrates that the embedded system community recognizes that OVP can help make software developers more productive, ensure higher quality software and dramatically reduce development costs for MPSoCs.”

Chezi Ganesan, President & CEO of VinChip Systems, Inc., said: “VinChip, an established developer of hardware IP cores, believes that there is significant opportunity in developing models at a higher level of abstraction. Open Virtual Platforms enables IP providers like VinChip to add more value to our product line.”

Year One Milestones:
The primary OVP objective is to enable the industry to build a suitable and effective multi-core virtual platform software development infrastructure. Year one OVP Milestones include:
• the development of 16 processor models
• the addition of a native interface to the SystemC/Transaction Level Modeling (TLM)-2.0 interface
• the availability of platforms that boot operating systems, including multi-core SMP Linux running faster than real time,
• the verification of processor models by 2 major vendors including the MIPS32 4K, 24K and 34K families being MIPS-Verified™ by MIPS Technologies and the ARC® 605 being verified by ARC International.
• research projects utilizing OVP by the Indian Institute of Technology Delhi and the University of Southampton
• the donation of open source peripheral and behavioral models to the OVP community, available for free download from the website
• the integration of other tools to the Open Virtual Platforms simulator (OVPsim) for enhanced software functional and performance verification, including Cadence’s Incisive Software eXtensions (ISX)
In related news, the success of OVPsim on Windows and requests from the OVP user base for Linux hosted machines has led to its release for non-commercial usage.

Open Virtual Platforms
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor and component models to more complex platforms, such as MIPS Malta development board for running Linux. APIs enable the community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged.

About the OVP Initiative (www.OVPworld.org)
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website (www.OVPworld.org) serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and silicon intellectual property (IP) providers.

About Imperas (www.imperas.com)
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and various analytical tools for embedded software operating on multiprocessor MP SoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit www.imperas.com.
Detailed quotations regarding OVP from all 27 companies are available from:  here.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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