Fast Models Developed Under MIPS-Verified™ Program

THAME, United Kingdom, March 31, 2010 – Imperas today released models of the new MIPS32® M14K™ and M14Kc™ processor cores from MIPS Technologies, Inc., including example virtual platforms utilizing these cores and support for the cores in Imperas’ advanced software development tools. The M14K family of processors is the first to support the new microMIPSTM code compression instruction set architecture (ISA) from MIPS Technologies, which is fully supported in the Imperas models. MIPS Technologies has verified the functionality of these models under the MIPS-Verified™ program.

The processor core models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/MIPS/M14K. The models of the MIPS® processor cores, as well as models of the other MIPS processors, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

“The M14K cores and the microMIPS ISA represent groundbreaking technology for microcontrollers and other low footprint embedded applications, where performance requirements together with cost and silicon size limitations are driving our customers,” said Sandeep Vij, president and CEO, MIPS Technologies. “Having MIPS-Verified support from Imperas and OVP, the leading independent supplier of fast models of processor cores, enables our customers to get started immediately with designs leveraging M14K cores.”

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models. The OVP simulator also has an Eclipse IDE integration, enabling easy use for software developers. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.

“Complex systems and performance and quality requirements demand that developers have state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP was founded to enable users to have fast simulation and other tools for software development, thus accelerating the development cycle.”

OVP offers MIPS developers access to the M14K models, as well as access to models of other MIPS processors, including the MIPS32 4K®, 24K®, 34K®, 74K® and 1004K™ families of cores. OVP also has reference virtual platforms incorporating the MIPS cores, including bare metal platforms and a virtual platform of the MIPS Malta™ development board. This Malta virtual platform enables users to boot Linux in under 5 seconds on a 2GHz laptop using OVPsim. These reference platforms are all available as source code, and are easily modified to add or change the memory and peripheral components to customize the platform as required for software development.

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

MIPS, MIPS32, M14K, M14Kc, 4K, 24K, 34K, 74K, 1004K, Malta and MIPS-Based are trademarks or registered trademarks in the United States and other countries of MIPS Technologies, Inc. Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.
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OVP Continues to Build Momentum as the De Facto Source of Fast Processor Models

THAME, United Kingdom, March 23, 2010 – The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has announced the release of models of Virage Logic’s ARC processor cores. Models of the Virage Logic ARC® 600 and ARC® 700 families of processor cores have been released, including the ARC® 605. Additionally, Virage Logic and Imperas have cooperated on the verification of the functionality of the models. Virage Logic’s ARC line of processor cores, the world’s second most widely used processor architecture, are commonly used in audio and video subsystems, and in flash controllers, among other applications. These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance reaching hundreds of millions of instructions per second. The models are free and available as open source from the OVP website.

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.

“Imperas is moving the embedded systems industry forward with its visionary approach to virtual platforms and the easy accessibility of OVP,” said Dr. Yankin Tanurhan, vice president and general manager, processor and NVM solutions, for Virage Logic. “Verifying the compatibility and functionality of these high-performance models of our ARC processors and making them freely available is a huge advantage for design teams worldwide. This availability will help enable them to develop high-quality software faster and more easily using virtual platform models of their complete SoCs and embedded systems.”

“As the semiconductor industry’s trusted IP partner, Virage Logic recognizes the importance of freely available models to enable rapid growth and accelerate the design and programming of embedded systems on chip,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “Compatibility and quality of models is essential when using virtual platforms to develop software. Offering free, verified processor models means developers can get higher quality software developed faster and help close the software gap.”

About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42.

About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

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