With these components it is very easy to put together advanced multi-core heterogeneous or homogeneous platforms with complex memory hierarchies and layers of embedded software - that run at 100s of MIPS on standard desktop PCs.
In the downloads area are many examples of components, and complete platforms - these are being added to all the time. For example you can download a simple example of a ARM Cortex-A72MPx4 platform as source or executable, download an example program like the Dhrystone benchmark as source or executable, download the appropriate ARM tool chain to compile and debug - and within a few minutes - get it running on your own Windows PC try it - experience for yourself what a Software Virtual Platform running at 300MIPS feels like... Download it now... touch the new world of embedded software development using OVP.
If you have questions about the OVP technology, please browse the forums for information.
If you are interested in using OVP technology with SPIRIT Consortiums IP-XACT or SystemRDL then please look at the SPIRIT page.
If you have a bug or other issue please visit the forums to raise the issue and in the first instance check that others have not already had an answer to the same question.
Within OVP there are several different model categories. These models are provided as both pre-compiled object code, and often as source files.
Currently there are processor models of ARC, ARM, MIPS, PowerPC, Renesas, Altera, Xilinx, and OpenRisc families. There will be other families in due course.
There are also models of many different types of system components including ram, rom, trap, cache, bridge, etc.
There are also peripheral models including dma, uart, fifo, ethernet, usb, etc.
There are also models of several different pre-built platforms which run operating systems including Linux, Android, MQX, Nucleus, Micrium, FreeRTOS, and others.
The models are hosted on this OVP site. Please visit the model download area for up-to-date listings and to download.
A very fast simulator - OVPsim is provided in the download area. OVPsim is currently released on 32bit Windows and Linux. (Imperas providess OVP simulators that run on 64bit Linux and Windows.) OVPsim provides the simulation capabilities to run platforms of OVP processor and peripheral models at blisteringly fast speeds - please download an example to experience how fast Software Virtual Platforms can run with OVP. A typical 32 bits RISC processor will boot an OS at 2-500MIPS on a desktop PC. Peak speeds of several billion instructions per second have been experienced...
OVPsim is a Just-In-Time Code Morphing (binary translation) simulator engine that dynamically translates target instructions to x86 host instructions. OVPsim has been specifically architected for the fastest simulation throughput and includes many optimizations enabling simulation of platforms utilizing many homogeneous and heterogeneous processors with many complex memory hierarchies. OVPsim includes very efficient modeling of MMU/TLBs and hardware virtualization.
Platforms of over 1000 processors have been simulated efficiently on desktop PCs.
For more information please visit the OVPsim area of the downloads area for a detailed explanation.
OVPsim can be wrapped and called from within other simulation environments and comes as standard with wrappers for C, C++, and SystemC.
Another key technology component of OVPsim is that it can encapsulate existing binary models of processors and behavioral models. It therefore easy to utilize existing legacy processor models in an OVP simulation. (Though of course the overall speed of the simulation may be limited by the speed of these encapsulated models.)
OVPsim comes with a GDB RSP interface and is easy to use with standard debuggers that support this GDB RSP interface.
The OVPsim package from this website includes the Imperas iGen model building wizard. iGen takes a simple TCL input script and using its powerful commands will create complete OVP C virtual platforms and modules. iGen will also create C++/SystemC/TLM2 platform models that can be used with the OSCI SystemC simulator from Accellera and with all main commercial SystemC simulators from Cadence, Mentor, and Synopsys. iGen also creates the C OVP structural and register interface code for behavioral peripheral models. It also creates the stubs that are used to add user defined behaviors.
The ISS allows you to load cross compiled embedded software binary elf files and run them on any of the 150+ embedded processor variants in the OVP library. You can just simulate, or attach a debugger to work on your embedded software.
Included within the OVP package is the iGui. This is a powerful yet simple to use GUI based interface to the GDB debugger. Visit one of the Demo/Processor examples to experience the iGui in action. One simple command line option to any of the simulators launches the iGui to perform grpahical source code debug on your embedded software.
eGui is the Imperas Eclipse based GUI debug interface. eGui is a separate OVP package and includes code to allow easy usage with Imperas simulators. When you have downloaded the eGui package form OVPworld, visit one of the Demo/Processor examples to see how eGui is easy to use. Like iGui, eGui can be launched and connected to the simulator with one simulator command line option.
Both eGui and iGui work well with standard single processor GDB debuggers. For multi-processor debugging both iGui and eGui work with the Imperas commercial MPD (Multi-Processor Debugger).
Within OVP, models are created by writing code calling functions in a specific modeling API. These APIs are based around C and are normally used with C, though there are templates available for use with C++ and SystemC.
To model an embedded system there are several main items to be modeled: Platforms, Processors, Peripherals and environment. The platform purely connects and configures the behavioral components. The processors fetch and execute object code instructions from the memories, and the peripherals model the components and environment that the operating system and application software interacts with.
OVP modeling comprises several APIs; OP, VMI, BHM/PPM.
In the downloads area are the very complete reference documentation, application notes, online documents, header files and examples of all of the different functions in each API. Please view these documents for full explanation and reference.
For platforms there is the OP API for constructing, controlling, connecting, and observing platforms. This API can be called from C, C++, or SystemC. Platforms are made up of modules and are controlled with a test bench or test harness. The module provides the basic structure of the design and creates, connects, and configures the components. The module also specifies the address mapping, and software that is loaded on the processors. It is very easy with OP to specify very complex and complete platforms of many different processors, local and shared memories, caches, bus bridges, peripherals and all their complex address maps, interrupts and operating systems and application software. OP is also used to construct the test harnesses that instance the platforms and controls the simulation of them.
For processor modeling there is the VMI API. These API functions are called from your C code and provide the ability to easily describe the behavior of the processor. A processor model written in C using the VMI basically decodes the target instruction to be simulated, translates this to x86 instructions that are then executed on the PC. VMI can be used for modeling 8, 16, 32, and 64 bit architectures and has extensions for VLIW, DSP etc. There is an interception mechanism enabling the trapping of calls to functions in the application runtime libraries such as printf without requiring the modifying of processor models.
Behavioral components, peripherals, and the overall environment is modeled using C code and calls to these two APIs. Underlying these APIs is an event based scheduling mechanism to enable modeling of time, events, and concurrency - it is normally very easy to model functionality of embedded system components. Peripheral models provide callbacks that are called when the application software running on processors modeled in the platform access memory locations where the peripheral is enabled. These APIs provide extremely efficient behavioral modeling capabilities.