Imperas Software Ltd (the instigators and maintainers of OVP) was acquired by Synopsys, Inc. in late 2023. This site content has now been retired and the main components and key documentation moved to a GitHub repository.
As part of Synopsys, Imperas' OVP related focus is on the development of ImperasFPM (Fast Processor Models) written and controlled using the OVP VMI, and OP APIs. The models are currently available and used in products from Synopsys, including Virtualizer and ImperasDV RISC-V Design Verification tools . Many other companies and technologies use these models in their environments in C, C++, SystemC, SystemVerilog, Python, etc.
There have been over 500 processor variants using 18 different ISAs created using OVP technology and available with OVP based simulators from Synopsys.
If you would like more information on OVP modeling and for a list of some of the main models available, visit the OVPworld github: https://github.com/OVPworld/Information.
If you would like more information about the legacy Imperas virtual platform technology and peripheral / platform models then please contact us.
If you would like more information about the Synopsys solutions please visit the Synopsys Virtualizer pages.