What is the goal of Open Virtual Platforms?
OVP is dedicated to making software virtual platforms an easy and ubiquitous element of embedded software development. As the hardware has gotten more complex, the embedded software has also become more complex, and requires new tools. Software virtual platforms, enabling embedded software simulation, verification and debug, are the key technology to effective embedded software development going forward.
Why has Imperas donated this key technology to OVP?
Imperas believes that the real value to users is in the verification, debug and analysis tools. These are the tools that can be readily linked to a ROI calculation. Imperas develops and sells tools which will work on top of the OVP platforms.
Can other companies develop tools that will work on the OVP platforms?
Yes, there are several companies that make use of OVP in their products. Imperas is encouraging the OVP community to do just that.
What is OVP?
OVP comprises three main components:

1. OVP models. These are true Open Source Software and thus there are no licensing costs for using, copying, modifying, enhancing these models.

2. OVP APIs. The APIs enable users to model processors, peripherals behavioral models and platforms to create extremely fast software virtual platforms. This component consists of C/C++ header files and associated documentation for each API. There are no licensing costs for using the APIs or documentation.

3. OVPsim, iGen, ISS tools. These are released as binary only implementations and are provided via a click-through license. This license restricts things like reverse engineering, and for non-commercial usage allows completely free usage, and can be used with any other software/simulation environment. Licenses are generated by servers directly from the OVPworld site. Commercial license are available from Imperas.

OVP models are provided with interface wrappers for C, C++, SystemC, and OSCI SystemC TLM (TLM2.0) environments. With the free, open source, OVP models, OVPsim produces Instruction Accurate (IA) simulations of platforms running unmodified software binaries at typical speeds up to 1,000 MIPS.

What does OVP cost?

OVP is free to use for non-commercial usage and it is hoped that users will contribute back with suggestions for enhancements and will add more models to the open source model library. For commercial usage please contact the OVPsim developers, Imperas.

How stable and mature is OVP?

OVP is very stable and mature and the simulation components of OVP have been in commercial use since mid 2006. Over 350 companies downloaded and used OVP technology and OVPsim in the first 8 months of availability.
Is professional support and training available for OVP?
Yes! The OVP community includes services and training companies. Also, Imperas (www.imperas.com) offers a selection of professional support options. These include training on usage, model building, and methodology, and services to help customers develop specific models.
What platforms does OVPsim work on?
OVPsim works natively on Windows and Linux. On Windows it can also work within Cygwin.
Please see the Installation and Getting Started Guide for details of specific versions.
What free tools work with OVP?
OVP can be used with available GNU C compilers (GCC etc) and GNU Debuggers (GDB) for the specific models. OVPsim is compatible with the GNU GDB RSP interface and so will work with many software debuggers and other tools. Many users use OVP simulators within the Eclipse IDE.
Are there commercial tools that work with OVP?
Yes! Imperas (www.imperas.com) markets a suite of tools based around OVP including productivity tools, advanced multi-core simulation, multi-core debug, and automatic software verification. Imperas can provide a methodology to dramatically reduce embedded software development timescales.

There are many partners involved with OVP and several have released products. Please see the partners lists.

How can I participate or contribute to OVP?
If you decide to use OVP you will benefit from the success of OVP as it gains more and more widespread use. If you use existing models and have issues - please raise these in the forums and feedback any enhancements you make. If you develop your own models using OVP, please make them available in the models library and we will ensure there is a forum set up for discussion on them.

We welcome all suggestions for improvements to the OVP project - please use the development forum or contact us directly (info[at]ovpworld.org)

How do I spell OVP and OpenVirtualPlatforms correctly?
OVP and OpenVirtualPlatforms
What license is used for OVP?
The different components have different licenses.

OVP models created by Imperas and donated to OVP are licensed under a modified Apache 2.0 open source license.

OVP APIs are licensed with the simulator license - which is a click-through and gives users free usage of the APIs.

OVPsim/iGen/ISS are licensed under a click-through license at point of installation. This license allows usage by the downloader for non-commercial use and prohibits reverse engineering etc.

To to review the licenses, click here.

Who is coordinating the OVP development?
The development of OVP is officially coordinated by Imperas. An active Open Source community is starting to participate in the OVP development and a number of ecosystem partners around the world are building products that utilize OVP.
Who will decide what changes are being made to OVP?
This is currently under discussion. If you are interested to participate - contact us (info[at]ovpworld.org).
What is the history of OVP?
It has recently become obvious that software virtual platforms were extremely important to the future of software development and that some form of industry-wide standard and approach was needed. Imperas had built an extremely fast, efficient, easy to use, and high quality virtual platform development environment and in December 2007 the decision was made to make it publicly available and to make the models open source, and free. OVP was conceived by Imperas and has been developed in Imperas since 2005. In February 2008 the technology behind OVP was made public and the models open sourced for the first time. Many individuals and companies have contributed to OVP success and we are grateful for their support.
What models are available?
Models of processors and peripherals are available for download. Please see the Model Library page for the latest list of models available.

Can existing processor models be used with OVP?

OVP includes technology for encapsulating existing processor models within an OVP platform. This allows users the reliability of working with their pre-existing, established models, thus mitigating the risk of transitioning to OVP. However, the OVP platform simulation only runs as fast as the slowest component, which is likely to be this pre-existing processor model. We expect that users that take this path will use and/or develop OVP-based processor models quickly.

What about existing behavioral models? Can they be used with OVP?

Existing C/C++/SystemC/TLM behavioral models can be used. Usually they would be sitting outside a subsystem platform built with OVP. Behavioral models are usually not difficult or time consuming to redevelop, so it may be best to rewrite these in OVP. Any OVP model can be wrapped in a TLM2.0 wrapper and used in a SystemC TLM2 environment.

What about OVP working with existing C/C++/SystemC/TLM/TLM2.0 platforms?

A good transition plan would be to take the most difficult MP subsystem and rewrite those models in OVP, leaving the remainder of the platform as C/C++/SystemC/TLM/TLM2.0. In this situation the OVP subsystem could be run independently, or run under the C / C++ / SystemC / TLM / TLM2.0 overall platform.

Why is OVP so specific about using the software virtual platforms? Is there other existing virtual platform technology?

There is existing virtual platform technology, which in its various forms is hardware virtual platform technology. Hardware virtual platform technology always has a sense of the real hardware underneath. For example, bus models are included in hardware virtual platforms. Even if modeled as transactions, this still limits platform simulation speed to about 10 MIPS, less for a complex, multi-processor architecture. In contrast, software virtual platforms are developed from the programmers perspective. Embedded software programmers do not see a bus, they see processors, memory and peripherals, with the peripherals just having an address. By using just what is needed to allow OS and application development, software virtual platforms enable simulation speeds in the 100s of MIPS, even for SoC architectures with many cores. Hardware virtual platforms are useful for architecture performance analysis, and driver and firmware development.

Dont embedded software applications running on real time operating systems (RTOS) require a knowledge of the SoC architecture and timing to get it right?

Absolutely. However, over 90% of the embedded software verification can be done at the Instruction Accurate (IA) level of software virtual platforms, with simulations running 100s of MIPS. The timing/cycle accurate simulations should be done after IA verification has been finished. This is quite similar to the hardware development methodology, where gate level simulations are done only after RTL simulations are completed.

How does OVP technology scale with multiple processor cores on a single SoC platform?

OVP scales as the hardware itself will scale, or even faster. OVP maintains simulation speeds in the 100s of MIPS even as more and more processors are added to the platform. This has been tested in simple examples up to 200 processors on a single chip. In practice, one user has developed platforms with 24 processors, and another is working on one with 100 processors.
Does just in time code morphing technology used by OVP require that the processor models developed have the same bus width as the underlying processor on the workstation?
No. 64-bit processor models have been developed with OVP to run on 32-bit x86 native hosts. Imperas is currently working with another user to develop a 16-bit processor model for 32-bit x86 hosts. The key is defining the equivalence table from the processor being modeled to the x86 instruction set.
Do processor model instructions have to match those on the native host? For example, what if the model floating point unit does not do rounding in the same way as the host?
There is no requirement that the model instructions exactly match host capabilities, although simulation is faster if they do.
On the hardware side, lack of simulation/verification resulted in chip respins, with the attendant cost and schedule slip. Is there an analogy in the embedded software situation?
There is no one single event, like a respin, that forces SoC producers and their embedded software development teams to use simulation/verification. (Unless we count a car just turning off and stopping in the middle of the highway as such an event.) But we can call this the death by a thousand cuts. Software teams are sometimes doing a new release each week to fix the bugs in their software! This ongoing maintenance cost represents a huge burden to software teams; reducing this is critical to the success of SoC-based products. The ability to bring in a production schedule by weeks to months also represents a huge payoff.

Does OVPsim take advantage of the typical host multi core x86 capability?

At this time, OVPsim achieves its 1-2 orders of magnitude performance advantage without making use of the multi-processor host capability.

Imperas has a commercial solution called QuantumLeap that makes use of host parallelism to accelerate simulation. QuantumLeap can accelerate multiple processor and multiple peripherals.

Can OVP add cycle accurate (approximate) simulation capability?

There are currently no plans to add cycle accurate simulation capability to OVP modeling APIs or OVPsim. It is possible to do so, and could happen in the future. OVP is focused on Instruction Accurate - if you need cycle approximate simulation, then please contact a commercial vendor such as Imperas.

Why does a conventional ISS not work for multiprocessor platform modeling/simulation?

Most existing simulators have been designed from the outset with a single processor view in mind. In a multiprocessor environment, there are many difficult problems to solve that do not occur in a single processor view: complex memory and bus hierarchies, the ability for one processor to shut down and restart another, the ability to pass data between processors using constructs such as blocking FIFOs, for example. And if the platform is heterogeneous, there is yet another level of difficulty: how do I combine two proprietary simulators in a single platform simulation? With OVP, we provide proven technology that is capable of supporting complex multiprocessor platforms, designed in from the start.
Why should I spend the time and money building models at the IA level when I have to do it again with cycle accuracy?
Cycle accurate models are just too slow for modeling real systems: application developers need to run billions of instructions at close to real time speeds.
What are the differences between OVPsim and Qemu?
Qemu is an open source fixed platform simulator, targeted mainly at PCs and derivative platforms.
Qemus strong point is simulation of a fixed, defined single processor platforms with reasonable speed.
In contrast, OVPsim has been designed to take this kind of capability to the next level.
OVPsims strengths compared to Qemu are:
1. OVPsim is great for multiprocessor platforms with arbitrary shared and local memory configurations.
2. OVPsim can handle simulation of processors with virtual memory with almost no performance penalty.
3. OVP models of ARM and MIPS have models of hardware virtualization that run very efficiently.
4. It is very easy in OVPsim to make new platforms using the OP interface and the iGen wizard. Just have a look at some of the platform defining files in the demos and examples directories that are part of the OVP packages to see how easy this is.
5. OVPsim has a really smart way of implementing peripherals using OVPsim Peripheral Simulation Engine (PSE) technology. If you look again at the OVPsim_or1k_uclinux demo platform defining C file, you will see that the uart model functionality is not built into this file at all, but is loaded as a separate plugin into a PSE. PSEs support lots of important features such as threads, events, time delays and so on that make it really easy to write peripheral models that are reusable.
6. OVPsim also supports completely non-intrusive semihosting using dynamically loaded libraries that are completely separate to processor models. There is no need to compile up application code with special flags to support semihosting: given an appropriate semihost library, OVPsim can run on a completely unmodified binary. OVPsim semihosting works by allowing semihosting libraries to take special actions either when particular functions are executed in the simulated application (e.g. write) or when particular instructions are executed (e.g. break instructions). If you look in the OVPsim_or1k_single demo directory, for example, you will see the or1kNewlib dll, which is what supports semihosting in this test case.
7. OVPsim is also really fast.
Imperas has run some performance measurements in OVPsim using a platform incorporating a MIPS Technologies 32 bit processor. Running the Dhrystone benchmark OVPsim runs at over 800 MIPS. OVPsim has been measured on other testcases running at over 2,000 MIPS (yes over 2 Billion Instructions Per Second) on a 2.8GHz PC.
8. The technology behind OVPsim also allows much more than is shown currently. For example, Imperas have plugins that use the semihosting technology that do code profiling (like gprof), memory checking (like valgrind) and other things, all on completely unmodified applications. Imperas also have a true multiprocessor-aware debugger that anyone who knows gdb will be able to use (not lots of separate gdbs). If you write models for use with OVPsim, they will be able to work with these commercial tools too. Contact Imperas for more information.
Are there more platforms being supported in Qemu than with OVP?
Qemu has several different PC derivative platforms and is targeted at fixed platform virtualization. OVP is architected to allow users to easily configure and build their own platforms and is targeted at the hundreds of SoCs and MPSoCs being designed. There are currently over 30 different publicly available Extendable Platform Kits (EPKs) available on the OVP website. These are models of platforms where there is full source of the platforms and most peripherals.
Is it easier to create models and build platforms with OVP than with Qemu?
OVP has a complete methodology and separate well defined APIs for creating and adding processor models, and behavioral models. One of the key strengths of OVP is its ease of modeling components, and then adding them to different platforms. The APIs are defined enabling models created by one user to be used with models and platforms created by another user. This interoperability is important and essential to efficiently model the vast number of embedded platforms being built. Every large chip needs a virtual platform to enable software development and OVP has been architected to make it very easy to create the models and put the platforms together.
How good is the support for MIPS Technologies processors in OVP compares to Qemu?
In August 2008 MIPS and Imperas announced a partnership where Imperas will develop OVP processor models of MIPS Processors and MIPS Technologies will validate them and assign them the MIPS-Verified(tm) mark. All MIPS 32bit and 64bit processors have been modeled, and the models are available as MIPS-Verified.
We are not aware of any of the Qemu simulations being awarded similar validated quality and reliability status.
Do OVP models have the same problems with GPL open source licensing as Qemu?
Really good question.
The Qemu code is covered under the GPL open source license which means that if you use it in your product or extend it, or co-simulate with it etc, then you need to open up all of your source with the GPL open source license too - which means you end up giving away your trade secrets and your code, and if you are not careful, GPL proliferates into all of your products like a virus - meaning you end up damaging your for-profit business.

OVP is very different to this. One of the key decisions for OVP was to use the Apache 2.0 open source license for the models that are part of OVP - this means you can download them, modify them, use them, ship them to your customers, - all as open source, or as binary - and you are under no obligation to provide the modified source, or in fact amy source code with your products. So you can if you want, but it is up to you - this is exactly what you need - access to the source, modify, and then do what you want and need - a far better approach. You can even sell these modified models if you want. Apache 2.0 is good for business.