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There are often issues with RISC-V toolchains and versions of the extensions they support.
For ease of use, Imperas have provided some precompiled GCC versions on their public GitHub: https://github. ...

First point to note is that the interface supports TCP/IP traffic and ping uses ICMP which is not supported so you cannot use ping to determine if the interface is alive.

The Ethernet interface mod ...

for (1) I think you are correct. The time slice must be smaller than the minimum delay required. I think this requires a minor documentation change.

for (2) I cannot think of an obvious reason that ...

There are OP API functions that allow you to monitor accesses.
You will get the data of the transaction provided in the callback, so the instruction binary on an instruction fetch. Please review the ...

I am afraid there is no function available in the OP or VMI APIs that allow an instruction to be decoded. The instruction decode information is all embeded in the processor models.
There are function ...

You can add callbacks onto the bus or memory that can be used to detect accesses and determine the data. Please see the monitoring functions in the OP API.

I have re-created this issue. We have decided that this is using the peripheral model delays in a way in which they were not intended. Because the instruction is re-started after the delay the simple ...

Universities can register for the Imperas University Program. This can provide access to the professional products free of charge for academic and educational usage.
Please contact univ@imperas.com

What you are doing looks correct, we will try to figure out what you are seeing and why it is happening .. will get back to you asap :)

I don't believe that there is such a thing in a processor.

It is very important that "everything" is rebuilt using the same C++ compiler and flags.
The build process has been improved in the forthcoming next release but at the moment can you try se ...

The OVP simulator provides information at an instruction level. This can be used to provide some estimations.

The Imperas professional products can be used to obtain information from an executingap ...

We have looked at the test case you provided and determined that the problem is that this processor has physical memory protection (PMP) registers, and these have not been set up by Machine mode, so S ...

I have sent you a PM with an email address to send a test case so that we can re-produce this issue and provide you a solution.

This appears to be a host program incompatability.

What is the host machine and OS that you are running on?

This error does not appear to be quite the same but are you running a 32-bit OVP progr ...