OVP Forums - A community of assistance, help, questions, and answers.
  FAQFAQ    SearchSearch      RegisterRegister  ProfileProfile    Log in to check your private messagesLog in to check your private messages    Log inLog in
Search found 157 matches
Open Virtual Platforms Forum Index
Author Message
  Topic: PMP fetch exception
JimStraus

Replies: 2
Views: 312

PostForum: Ask a Question   Posted: Mon Aug 22, 2022 10:09 am   Subject: PMP fetch exception
Hi Jonathan,

Thanks for sending the test files. I have recreated the problem in my environment and the following is my initial analysis of the problem, in order to make it clear to any other intere ...
  Topic: PMP fetch exception
JimStraus

Replies: 2
Views: 312

PostForum: Ask a Question   Posted: Mon Aug 22, 2022 7:00 am   Subject: PMP fetch exception
Would it be possible to provide a test case in an email to support@imperas.com?

Please provide the elf file you are running, the riscvOVPsim command line you are using, and a complete log file from ...
  Topic: OVPSIMPLUS executed an illegal instruction.
JimStraus

Replies: 8
Views: 469

PostForum: Ask a Question   Posted: Mon Aug 15, 2022 8:11 am   Subject: OVPSIMPLUS executed an illegal instruction.
For the record, this is all described in detail in the model specific documentation for the RV64GCB, which may be found in this (non-obvious) location in your installation:
$IMPERAS_HOME/ImperasLib ...
  Topic: RISC-V Cannot add U-type instruction
JimStraus

Replies: 2
Views: 692

PostForum: Ask a Question   Posted: Mon Apr 25, 2022 11:56 am   Subject: RISC-V Cannot add U-type instruction
Support for the RiscV J-, B-, S- and U-Type encodings has been added to the Riscv Extension decode helper functions. Ths change will be included with all future releases.

See doc/ovp/OVP_RISCV_Mode ...
  Topic: How to create the Elf file from target compilation process
JimStraus

Replies: 2
Views: 2380

PostForum: First time - readme   Posted: Mon Jul 26, 2021 2:09 pm   Subject: Re: How to create the Elf file from target compilation proce
Dear supporter,

1) In the ISS demo, the elf file is created by the host compiler or the cross compiler?

The cross compiler for the target architecture being simulated using ISS

2) Can OPVSIm ...
  Topic: I want to know how to write my own module or peripherals?
JimStraus

Replies: 20
Views: 10349

PostForum: Ask a Question   Posted: Wed Apr 28, 2021 7:05 am   Subject: I want to know how to write my own module or peripherals?
Sorry - that directory was inadvertently left out of the release. We will fix that in future releases. Thanks for pointing that out.

In the meantime I have created a tar file with that example here ...
  Topic: How to know if a conditional instruction is executed ?
JimStraus

Replies: 1
Views: 2353

PostForum: Ask a Question   Posted: Fri Apr 16, 2021 11:07 am   Subject: How to know if a conditional instruction is executed ?
As you say, the ARM conditional instructions are included in the instruction counts whether they execute or not. Since OVP is not a cycle accurate simulator it cannot be expected to account for any cy ...
  Topic: I want to know how to write my own module or peripherals?
JimStraus

Replies: 20
Views: 10349

PostForum: Ask a Question   Posted: Fri Apr 16, 2021 10:47 am   Subject: Re: I want to know how to write my own module or peripherals
Yeah´╝îwhat I couldn't understand is that how can I write my C code to build the behavior of peripheral.And how can I test the correct behavior by application.c file?Can you provide a simple periphera ...
  Topic: OVPsim can't be correctly installed
JimStraus

Replies: 2
Views: 6131

PostForum: First time - readme   Posted: Wed Jul 18, 2018 3:07 pm   Subject: OVPsim can't be correctly installed
Generally this is due to the Linux path not including the directory '.'. The easiest solution is to add './' to the commmand, e.g.
./Run_Fibonacci.sh
  Topic: Uncaught Exception (SIGSEGV) at 0x80a06df
JimStraus

Replies: 6
Views: 11282

PostForum: Getting started   Posted: Tue Mar 06, 2018 4:05 pm   Subject: Uncaught Exception (SIGSEGV) at 0x80a06df
FYI, the compilation error I reported only shows up when using very old versions of gcc (e.g. 4.4.3).

In any case we cannot seem to reproduce the problem you are seeing. If you would like to send y ...
  Topic: Uncaught Exception (SIGSEGV) at 0x80a06df
JimStraus

Replies: 6
Views: 11282

PostForum: Getting started   Posted: Mon Mar 05, 2018 3:33 pm   Subject: Uncaught Exception (SIGSEGV) at 0x80a06df
I tried to recreate the problem by downloading SystemC 2.3.1a from http://www.accellera.org/downloads/standards/systemc and found that it throws a compilation error when building:


# Compiling Bui ...
  Topic: Increace VM disk size
JimStraus

Replies: 1
Views: 3849

PostForum: Ask a Question   Posted: Wed Feb 21, 2018 7:21 am   Subject: Increace VM disk size
Which disk are you referring to - by default that demo uses only an initrd RAM disk. There are also instructions describing how to download and mount a Linux distribution's disk image file. It is not ...
  Topic: ISS says license expired ...
JimStraus

Replies: 4
Views: 9690

PostForum: Licensing   Posted: Thu Feb 15, 2018 8:44 am   Subject: ISS says license expired ...
I think the problem is the setting of the IMPERAS_ISS environment variable. Try changing that from "issdemo.exe" to "iss.exe".

FYI, issdemo.exe is intended to be used by users ...
  Topic: Where to download RISC-V modules?
JimStraus

Replies: 9
Views: 16676

PostForum: Current models   Posted: Mon Oct 02, 2017 9:55 am   Subject: Where to download RISC-V modules?
FYI, Binaries for Risc-V gcc can be found here:

https://github.com/gnu-mcu-eclipse/riscv-none-gcc/releases/latest
  Topic: FreeRTOS_arm Error
JimStraus

Replies: 2
Views: 4846

PostForum: Ask a Question   Posted: Wed Aug 16, 2017 1:12 pm   Subject: FreeRTOS_arm Error
The problem may be the make program you are using. Try running mingw32-make instead of make.
 
Page 1 of 11 Goto page 1, 2, 3 ... 9, 10, 11  Next
All times are GMT - 8 Hours
Jump to:  


Information regarding OVP © 2008-2022 Imperas Software