Author |
Message |
Topic: RISC-V Cannot add U-type instruction |
JimStraus
Replies: 2
Views: 330
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Forum: Ask a Question Posted: Mon Apr 25, 2022 11:56 am Subject: RISC-V Cannot add U-type instruction |
Support for the RiscV J-, B-, S- and U-Type encodings has been added to the Riscv Extension decode helper functions. Ths change will be included with all future releases.
See doc/ovp/OVP_RISCV_Mode ... |
Topic: How to create the Elf file from target compilation process |
JimStraus
Replies: 2
Views: 2076
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Forum: First time - readme Posted: Mon Jul 26, 2021 2:09 pm Subject: Re: How to create the Elf file from target compilation proce |
Dear supporter,
1) In the ISS demo, the elf file is created by the host compiler or the cross compiler?
The cross compiler for the target architecture being simulated using ISS
2) Can OPVSIm ... |
Topic: I want to know how to write my own module or peripherals? |
JimStraus
Replies: 19
Views: 8870
|
Forum: Ask a Question Posted: Wed Apr 28, 2021 7:05 am Subject: I want to know how to write my own module or peripherals? |
Sorry - that directory was inadvertently left out of the release. We will fix that in future releases. Thanks for pointing that out.
In the meantime I have created a tar file with that example here ... |
Topic: How to know if a conditional instruction is executed ? |
JimStraus
Replies: 1
Views: 2086
|
Forum: Ask a Question Posted: Fri Apr 16, 2021 11:07 am Subject: How to know if a conditional instruction is executed ? |
As you say, the ARM conditional instructions are included in the instruction counts whether they execute or not. Since OVP is not a cycle accurate simulator it cannot be expected to account for any cy ... |
Topic: I want to know how to write my own module or peripherals? |
JimStraus
Replies: 19
Views: 8870
|
Forum: Ask a Question Posted: Fri Apr 16, 2021 10:47 am Subject: Re: I want to know how to write my own module or peripherals |
Yeah,what I couldn't understand is that how can I write my C code to build the behavior of peripheral.And how can I test the correct behavior by application.c file?Can you provide a simple periphera ... |
Topic: OVPsim can't be correctly installed |
JimStraus
Replies: 2
Views: 5790
|
Forum: First time - readme Posted: Wed Jul 18, 2018 3:07 pm Subject: OVPsim can't be correctly installed |
Generally this is due to the Linux path not including the directory '.'. The easiest solution is to add './' to the commmand, e.g.
./Run_Fibonacci.sh |
Topic: Uncaught Exception (SIGSEGV) at 0x80a06df |
JimStraus
Replies: 6
Views: 10689
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Forum: Getting started Posted: Tue Mar 06, 2018 4:05 pm Subject: Uncaught Exception (SIGSEGV) at 0x80a06df |
FYI, the compilation error I reported only shows up when using very old versions of gcc (e.g. 4.4.3).
In any case we cannot seem to reproduce the problem you are seeing. If you would like to send y ... |
Topic: Uncaught Exception (SIGSEGV) at 0x80a06df |
JimStraus
Replies: 6
Views: 10689
|
Forum: Getting started Posted: Mon Mar 05, 2018 3:33 pm Subject: Uncaught Exception (SIGSEGV) at 0x80a06df |
I tried to recreate the problem by downloading SystemC 2.3.1a from http://www.accellera.org/downloads/standards/systemc and found that it throws a compilation error when building:
# Compiling Bui ... |
Topic: Increace VM disk size |
JimStraus
Replies: 1
Views: 3598
|
Forum: Ask a Question Posted: Wed Feb 21, 2018 7:21 am Subject: Increace VM disk size |
Which disk are you referring to - by default that demo uses only an initrd RAM disk. There are also instructions describing how to download and mount a Linux distribution's disk image file. It is not ... |
Topic: ISS says license expired ... |
JimStraus
Replies: 4
Views: 9198
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Forum: Licensing Posted: Thu Feb 15, 2018 8:44 am Subject: ISS says license expired ... |
I think the problem is the setting of the IMPERAS_ISS environment variable. Try changing that from "issdemo.exe" to "iss.exe".
FYI, issdemo.exe is intended to be used by users ... |
Topic: Where to download RISC-V modules? |
JimStraus
Replies: 9
Views: 15897
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Forum: Current models Posted: Mon Oct 02, 2017 9:55 am Subject: Where to download RISC-V modules? |
FYI, Binaries for Risc-V gcc can be found here:
https://github.com/gnu-mcu-eclipse/riscv-none-gcc/releases/latest |
Topic: FreeRTOS_arm Error |
JimStraus
Replies: 2
Views: 4544
|
Forum: Ask a Question Posted: Wed Aug 16, 2017 1:12 pm Subject: FreeRTOS_arm Error |
The problem may be the make program you are using. Try running mingw32-make instead of make. |
Topic: Issue with demo platform: Linux_ARMv8-A-FMv1 |
JimStraus
Replies: 9
Views: 11254
|
Forum: Ask a Question Posted: Thu Apr 27, 2017 3:52 pm Subject: Issue with demo platform: Linux_ARMv8-A-FMv1 |
Glad that worked out. The demo has been updated and will include the full 8GB in the next release. Thanks for pointing that out.
Jim |
Topic: Issue with demo platform: Linux_ARMv8-A-FMv1 |
JimStraus
Replies: 9
Views: 11254
|
Forum: Ask a Question Posted: Thu Apr 27, 2017 5:51 am Subject: Issue with demo platform: Linux_ARMv8-A-FMv1 |
Please ignore Duncan's comment about appending the dtb to the zImage file as it does not apply to this demo.
That would apply to some other Linux demos Imperas supplies, but not to the Linux_ARMv8 ... |
Topic: Issue with demo platform: Linux_ARMv8-A-FMv1 |
JimStraus
Replies: 9
Views: 11254
|
Forum: Ask a Question Posted: Tue Apr 25, 2017 3:53 pm Subject: Issue with demo platform: Linux_ARMv8-A-FMv1 |
I think the problem is that the device tree does not describe the full memory implemented in the platform.
Looking at the memory specification in the device tree files (Linux/foundation-v8*.dts), i ... |
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