OVP Forums - A community of assistance, help, questions, and answers.
  FAQFAQ    SearchSearch      RegisterRegister  ProfileProfile    Log in to check your private messagesLog in to check your private messages    Log inLog in
Shared Cache

 
Post new topic   Reply to topic    Open Virtual Platforms Forum Index -> Memories and Caches
View previous topic :: View next topic  
Author Message
AntonioPrioletti



Joined: 02 May 2011
Posts: 20

PostPosted: Fri Sep 16, 2011 7:34 am    Post subject: Shared Cache Reply with quote

Hi, I would suggest a problem. I have created an architecture with two processors, and I instanced a cache full privacy for both processors, and then a cache shared by connecting it always full to the first two via a single bus for sharing. Now if I make a call before the main application where a variable x-volatile, then the processor assigns the value 0 3. When I go to read the value of the variable x with the processor 1 this is always 0 and not 3 because the processor 0 has changed. Looking at the address of the variable x that coincides for both variables, then how come I always value 0? :cry:
Back to top
View user's profile Send private message
AntonioPrioletti



Joined: 02 May 2011
Posts: 20

PostPosted: Fri Sep 16, 2011 1:31 pm    Post subject: Re: Shared Cache Reply with quote

Sorry, but in precedent post I wrote a really poor english, because I am Italian; now think that it is better.

Hi, I would suggest a problem. I have created an architecture with two processors, and I instanced a full private cache for both processors, and then a shared cache of second level always full, by connecting it with the first via a single share bus. Now a create an example application when I define a volatile variable x, then the processor 0 assigns to it the value 3. When I go to read the value of the variable x with the processor 1 this is always 0 and not 3 though the processor 0 has changed that value in 3. Looking at the address of the variable x in both processor, that coincides, How can i solve this problem, doing so that the processor 1 read value 3 and not 0?

The code is:

volatile int x;

int proc0(int id)
{

printf("Cpu 0, before change x = %d \n", x);
x = 3;
printf("Cpu 0, after change x = %d, with address %p\n", x, &x);
}

int proc1(int id)
{
printf("Cpu 1, before change x = %d, with address %p\n", x, &x);
x = 20;
printf("Cpu 1, after change x = %d\n", x);
}



int main(int argc, char **argv) {

int id = impProcessorId();
printf("CPU %d starting...\n", id);

switch(id) {

case 0:
proc0(id);
break;

case 1:
proc1(id);
break;

case 2:
break;
}

return 1;
}
Back to top
View user's profile Send private message
DuncGrah
OVP Technologist
OVP Technologist


Joined: 27 Feb 2008
Posts: 1642
Location: United Kingdom

PostPosted: Fri Oct 07, 2011 5:44 am    Post subject: Reply with quote

This is the issue of using writeback rather than write through caches as discussed in this forum posting.
Back to top
View user's profile Send private message Visit poster's website
Display posts from previous:   
Post new topic   Reply to topic    Open Virtual Platforms Forum Index -> Memories and Caches All times are GMT - 8 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Information regarding OVP © 2008-2022 Imperas Software