Modeling cache

ShyamShankar · Joined: 14 Jan 2015 Posts: 34 Location: Kalady

Hi,
Can I model an instruction cache as virtually tagged physically indexed and data cache as physically tagged and physically indexed??
How do I change the tagging and indexing?? Is it possible??
I want to achieve accurate cache miss rates.

DuncGrah · Posted: Wed Jun 24, 2015 1:30 am Post subject:

Yes, you can get access to both the physical and virtual addresses of an access so you can model a cache as you require. These are passed, I believe, as part of the memory callbacks for an access. You would need to create a Full cache model, see example Imperas/Examples/Platforms/fullMMC

However, you say

ShyamShankar · Joined: 14 Jan 2015 Posts: 34 Location: Kalady

Could you explain a bit more as to how I can model the cache indexing and tagging??

DuncGrah · Posted: Wed Jun 24, 2015 2:32 am Post subject:

There are some examples of cache models using the MMC modeling component.
One such example can be found, as a configuration, at this location in an installation Imperas\ImperasLib\source\ovpworld.org\mmc\wb_1way_32byteline_2048tags\1.0\model with the common code that performs the modelling of the cache at this location in an installation Imperas\ImperasLib\source\ovpworld.org\mmc\support\1.0\include

Any other information is really down knowledge of cahce operation (there is lots of literature out there on this) and writing the C code to model the specific operation you require.

ShyamShankar · Joined: 14 Jan 2015 Posts: 34 Location: Kalady

Thank You.