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ARM GIC Block examples

 
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NightFury



Joined: 09 Jul 2020
Posts: 4

PostPosted: Mon Aug 03, 2020 9:08 pm    Post subject: ARM GIC Block examples Reply with quote

Hi,

Can you please point me to the examples where the usage of GIC block in ARM is illustrated in imperas directory?
Is this block implemented as per : https://developer.arm.com/architectures/learn-the-architecture/arm-corelink-generic-interrupt-controller-v3-and-v4-overview/single-page
https://developer.arm.com/documentation/dai0492/b/

Thanks in advance !
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DuncGrah
OVP Technologist
OVP Technologist


Joined: 27 Feb 2008
Posts: 1639
Location: United Kingdom

PostPosted: Mon Aug 17, 2020 5:24 am    Post subject: Reply with quote

Yes, the GIC within the ARM OVP Processor model can be configured to execute in a number of modes, including v3 GIC.

Please see the processor specific documentation for the ARM processor variant you are interested in configuring for the list of Formal Parameters which are used to configure the model e.g. enableGICv3 enabls the GIC to support v3 registers etc

The processor model documents would be found at PATH IMPERAS_HOME\ImperasLib\source\arm.ovpworld.org\processor\arm\1.0\doc with names such as OVP_Model_Specific_Information_arm_Cortex-A55MPx4.pdf

Hope this helps
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