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Memory Modeling

 
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LarryEvans



Joined: 23 Apr 2008
Posts: 1

PostPosted: Thu Apr 24, 2008 5:37 am    Post subject: Memory Modeling Reply with quote

Aside from using MMCs to model caches, what are the ways different types of memory can be modeled in OVP? Advantages/disadvantages?
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JamesKenney
OVP Technologist
OVP Technologist


Joined: 28 Feb 2008
Posts: 24

PostPosted: Thu Apr 24, 2008 11:47 pm    Post subject: Reply with quote

There are three options available to model memory:

1. Let the simulator do it itself (the most common case). The simulator implements a highly-efficient demand-paged memory scheme that allows memory to be shared between processors at arbitrary levels of granularity (down to even a single byte if required). Simulations using built-in memory allocation can run at hundreds of MIPS.

2. Provide backing store in the platform (or a simulated peripheral) for the simulator to use. For example, a simulated peripheral that models a VGA device might want to provide the simulator with a memory buffer that should be used for the screen memory, and then occasionally update a screen image with the buffer content. Such memory buffers can be used by the simulator with the same efficiency as built-in memory (hundreds of MIPS) and shared between processors if required in the same way. The platform or peripheral is responsible for allocating and managing the memory buffer.

3. Install callbacks on memory ranges so that functions in the platform (or simulated peripheral) are called whenever accesses are made to certain addresses. This is very useful for modeling memory-mapped peripherals, but is much less efficient than the options above, and therefore shouldn't be used if built-in or backing store memory could be used instead.

A single platform may freely intermix memory regions using all three approaches.
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