Andes Technology Corporation is the leading Asia-based supplier of high performance, low-power, small embedded CPU cores serving 2-billion SoCs.

Andes becomes the first mainstream CPU IP provider to adopt RISC-V, the open RISC Instruction Set Architecture (ISA) developed at the University of California Berkeley. Andes ISA, called AndeStar V5, supports 64-bits and the widely known RISC-V ISA as its subset and will bring the open, compact, and modular RISC-V into mainstream SoC applications.

More information on OVP models of Andes 32bit RISC-V processors

More information on OVP models of Andes 64bit RISC-V processors

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