OVP Peripheral Model: AtmelWatchdogTimer

Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.


WD: Watchdog The Watchdog is built around a 16-bit counter and is used to prevent system lock-up if the software becomes trapped in a deadlock. It can generate an internal reset or interrupt, or assert an active level on the dedicated pin NWDOVF. All programming registers are password-protected to prevent unintentional programming. for more information visit


Open Source Apache 2.0


This model is sufficient to boot Linux


Rev. 1354D ARM08/02


The WatchdogTimer peripheral model is located in an Imperas/OVP installation at the VLNV: / peripheral / WatchdogTimer / 1.0.

Net Ports

This model has the following net ports:

Table : Net Ports

NameTypeMust Be ConnectedDescription
IRQoutputF (False)

Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bp1

Table 1: Bus Slave Port: bp1

NameSize (bytes)Must Be ConnectedDescription
bp10x4000T (True)

Table 2: Bus Slave Port: bp1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile

Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 3: Publicly available platforms using peripheral 'WatchdogTimer'

Platform NameVendor

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