OVP Peripheral Model: FreescaleKinetisLPTMR

Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.


Provides the base behaviour for the OVP Freescale Kinetis platforms


Model of the LPTMR peripheral used on the Freescale Kinetis platform



Open Source Apache 2.0


The KinetisLPTMR peripheral model is located in an Imperas/OVP installation at the VLNV: / peripheral / KinetisLPTMR / 1.0.

Net Ports

This model has the following net ports:

Table : Net Ports

NameTypeMust Be ConnectedDescription
ResetinputF (False)

Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table 1: Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000F (False)

Table 2: Bus Slave Port: bport1 Registers:

NameOffsetWidth (bits)DescriptionR/Wis Volatile
ab_CMR0x832Low Power Timer Compare Register, offset: 0x8
ab_PSR0x432Low Power Timer Prescale Register, offset: 0x4
ab_CSR0x032Low Power Timer Control Status Register, offset: 0x0
ab_CNR0xc32Low Power Timer Counter Register, offset: 0xC

Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 3: Publicly available platforms using peripheral 'KinetisLPTMR'

Platform NameVendor

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