OVP Peripheral Model: Intel8259A
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Licensing
Open Source Apache 2.0
Description
Intel 8259A Programmable Interrupt Controller (PIT).
Limitations
This model has sufficient functionality to allow a Linux Kernel to Boot on the MIPS:MALTA platform.
Reference
Intel 8259A Datasheet. MIPS Malta Platform Reference Guide.
Location
The 8259A peripheral model is located in an Imperas/OVP installation at the VLNV: intel.ovpworld.org / peripheral / 8259A / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
spen | string | Configure the PIC as a "master" or "slave" |
Net Ports
This model has the following net ports:
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|
ir0 | input | F (False) | |
ir1 | input | F (False) | |
ir2 | input | F (False) | |
ir3 | input | F (False) | |
ir4 | input | F (False) | |
ir5 | input | F (False) | |
ir6 | input | F (False) | |
ir7 | input | F (False) | |
cas | inout | F (False) | |
intp | output | T (True) | |
Bus Master Ports
This model has the following bus master ports:
Bus Master Port: cascade
Table 2: cascade
Name | Address Width (bits) | Description |
---|
cascade | 3 | |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: io
Table 3: Bus Slave Port: io
Name | Size (bytes) | Must Be Connected | Description |
---|
io | 0x2 | T (True) | |
Table 4: Bus Slave Port: io Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|
reg_io0 | 0x0 | 8 | | | |
reg_io1 | 0x1 | 8 | | | |
Bus Slave Port: PCIackS
Table 5: Bus Slave Port: PCIackS
Name | Size (bytes) | Must Be Connected | Description |
---|
PCIackS | 0x1 | F (False) | |
Table 6: Bus Slave Port: PCIackS Registers:
Name | Offset | Width (bits) | Description | R/W | is Volatile |
---|
PCIackS | 0x0 | 8 | PCIackS | | |
Bus Slave Port: elcr
Table 7: Bus Slave Port: elcr
Name | Size (bytes) | Must Be Connected | Description |
---|
elcr | 0x1 | T (True) | |
No address blocks have been defined for this slave port.
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 8: Publicly available platforms using peripheral '8259A'