OVP Peripheral Model: OVPTrap4K

Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.


This is not based upon the operation of a real device but is intended to be used for bring up and development of new virtual platforms.


Open Source Apache 2.0


Open a port and allocate a 0x1000 Byte region of memory.

The region will act as standard memory with reports of read/write accesses.


The trap4K peripheral model is located in an Imperas/OVP installation at the VLNV: / peripheral / trap4K / 1.0.

Bus Slave Ports

This model has the following bus slave ports:

Bus Slave Port: bport1

Table : Bus Slave Port: bport1

NameSize (bytes)Must Be ConnectedDescription
bport10x1000T (True)

No address blocks have been defined for this slave port.

Page was generated in 0.0130 seconds