OVP Peripheral Model: RiscvSmartLoaderRV64Linux

Model Specific Information

This page provides introductory usage information for an Imperas OVP peripheral behavioral model. The page is split into sections providing specific information for this peripheral, including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.


Open Source Apache 2.0


Psuedo-peripheral to insert boot code for a Riscv 64-bit Linux kernel boot. Loads simulated memory with a device tree blob file and boot code to set regs and jump to a Risc-v Linux Kernel.


Only supports little endian


RISC-V Linux Kernel development


The SmartLoaderRV64Linux peripheral model is located in an Imperas/OVP installation at the VLNV: / peripheral / SmartLoaderRV64Linux / 1.0.

Peripheral Instance Parameters

This model accepts the following parameters:

Table : Peripheral Parameters

dtbstringName of the device tree blob file. (required when Smart Loader is not disabled)
commandstringSet command line passed to kernel. Will override a command line defined in the dtb. (optional)
appendstringAppend to the kernel command line defined in the dtb. (optional)
membaseuns64Base of main memory region (overrides device tree memory node when membase and memsize both set)
memsizeuns64Size of main memory region (overrides device tree memory node when membase and memsize both set)
slbootaddruns64Address where SmartLoader generated boot code and dtb will be loaded. Jump to this address to start boot process. (default: 0x1000)
bootimagestringName of boot image file to load at bootaddr, e.g. bbl.bin (optional - may instead load boot elf file with standard --objfilenoentry option)
bootaddruns64Address to call from SmartLoader's generated boot code. (default 0x80000000)
bootconventionenumerationBoot convention to use in call from SmartLoader generated boot code (bbl=Berkeley Boot Loader, fsbl=SiFive FSBL). (default: bbl)
disableboolSet to True to disable the SmartLoader. (all other parameters are ignored when this is set to True)

Bus Master Ports

This model has the following bus master ports:

Bus Master Port: mport

Table 1: mport

NameAddress Width (bits)Description
mport32Master port - connect this to the same bus connected to the Linux processor's data port.

Platforms that use this peripheral component

Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.

Table 2: Publicly available platforms using peripheral 'SmartLoaderRV64Linux'

Platform NameVendor

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