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Electronics and Computer Science Department

Sparc V8 Processor Model SparcV8

An OVP Sparc V8 model was created by Heng Ye at Southampton University as part of the work towards a degree of MSc in Systems On Chip. This was written up in a dissertation "SPARC V8 Processor Modelling and Simulation by Open Virtual Platforms".

This model is not a complete model of the Sparc V8 architecture but models the majority of instructions from the ISA.


  Attachment Size Date Added
      SparcV8.zip   183.03 KB   7/02/2020 1:17 pm
      sparc.igen.xml   4.88 KB   7/02/2020 10:05 am
 

Component Description for SparcV8/sparc.igen.xml

PROCESSOR

sparc

ELFCODE2
ENDIANbig
FAMILYSPARC International
IMAGEFILEmodel
LIBRARYprocessor
PROCDOC$IMPERAS_HOME/ImperasLib/source/soton.ac.uk/processor/sparc/1.0/doc/OVP_Model_Specific_Information_sparc_generic.pdf
RELEASESTATUS2
USEINDEFAULTPLATFORMT
VENDORsoton.ac.uk
VERSION1.0
VISIBILITY0

DOCSECTION

doc

TEXTDescription
DOCTEXT
txt
TEXTSparc V8 processor model.

DOCSECTION

doc_1

TEXTLicensing
DOCTEXT
txt
TEXTOpen Source Apache 2.0

DOCSECTION

doc_2

TEXTLimitations
DOCTEXT
txt
TEXTCore instruction set only. Incomplete and not fully verified.

DOCSECTION

doc_3

TEXTSource
DOCTEXT
txt
TEXTSource can be obtained from the OVPworld.org website under Processors / SparcV8

FORMALATTRIBUTE

variant

TYPEenumeration
DOCSECTION
doc
TEXTDescription
DOCTEXT
txt
TEXTProcessor variant
ENUM
sparc
VALUE0
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTSingle default variant

BUSMASTERPORT

INSTRUCTION

ADDRESSWIDTH32
ADDRESSWIDTHMAX32
ADDRESSWIDTHMIN32
MUSTBECONNECTEDT

BUSMASTERPORT

DATA

ADDRESSWIDTH32
ADDRESSWIDTHMAX32
ADDRESSWIDTHMIN32
MUSTBECONNECTEDF

COMMAND

isync

DOCSECTION
doc
TEXTDescription
DOCTEXT
txt
TEXTspecify instruction address range for synchronous execution
COMMANDARG
addresshi
TYPEUns64
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTend address of synchronous execution range
COMMANDARG
addresslo
TYPEUns64
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTstart address of synchronous execution range

COMMAND

itrace

DOCSECTION
doc
TEXTDescription
DOCTEXT
txt
TEXTenable or disable instruction tracing
COMMANDARG
after
TYPEUns64
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTapply after this many instructions
COMMANDARG
enable
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTenable instruction tracing
COMMANDARG
instructioncount
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTinclude the instruction number in each trace
COMMANDARG
off
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTdisable instruction tracing
COMMANDARG
on
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTenable instruction tracing
COMMANDARG
registerchange
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTshow registers changed by this instruction
COMMANDARG
registers
TYPEBoolean
DOCSECTION
doc
TEXTDescription
DOCTEXTtxt
TEXTshow registers after each trace

FILEVERSION

_version_0

MAJOR1
MINOR0


CategoryProcessor SouthamptonUniversity
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