OVP Peripheral Model: XilinxLogicoreFit
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Description
logiCore Fixed Interval Timer (PG110)
Limitations
Initial verion. Not clock accurate
Licensing
Open Source Apache 2.0
Reference
pg110-fixed-interval-timer November 18, 2015
Location
The logicore-fit peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / logicore-fit / 1.0.
Peripheral Instance Parameters
This model accepts the following parameters:
Table : Peripheral Parameters
Name | Type | Description |
---|
C_NO_CLOCKS | uns32 | |
C_INACCURACY | uns32 | |
CLOCK_RATE | uns32 | The clock rate at which to count (default 100) |
Net Ports
This model has the following net ports:
Table 1: Net Ports
Name | Type | Must Be Connected | Description |
---|
Rst | input | F (False) | |
Interrupt | output | F (False) | |