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XilinxML505



OVP Virtual Platform: XilinxML505

This page provides detailed information about the OVP Virtual Platform Model of the xilinx.ovpworld.org XilinxML505 platform.

Description

Xilinx ML505 Reference Platform

Licensing

Open Source Apache 2.0

Limitations

This platform provides a subset of the full platform functionality. It is provided to boot the Linux operating system. Other software may be used but the operation cannot be guaranteed.

Platform capable of booting linux

Reference

UG347 (v3.1.2) May 16, 2011

Location

The XilinxML505 virtual platform is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / platform / XilinxML505 / 1.0.

Platform Summary

Table : Components in platform

TypeInstanceVendorComponent
Processormicroblaze_0xilinx.ovpworld.orgmicroblaze
PeripheralLEDs_8Bitxilinx.ovpworld.orgxps-gpio
PeripheralIIC_EEPROMxilinx.ovpworld.orgxps-iic
Peripheralxps_intc_0xilinx.ovpworld.orgxps-intc
PeripheralHard_Ethernet_MACxilinx.ovpworld.orgxps-ll-temac
PeripheralSysACE_CompactFlashxilinx.ovpworld.orgxps-sysace
Peripheralxps_timer_1xilinx.ovpworld.orgxps-timer
PeripheralRS232_Uart_1xilinx.ovpworld.orgxps-uartlite
Peripheraldebug_modulexilinx.ovpworld.orgmdm
Peripheralmpmcxilinx.ovpworld.orgmpmc
Peripheralmb_plbxilinx.ovpworld.orgxps-mch-emc
MemoryBOOTMEMovpworld.orgram
MemoryDDR2_SDRAMovpworld.orgram
MemoryUNKNOWN_PERIPHovpworld.orgram
Busbus1(builtin)address width:32



Command Line Control of the Platform

Built-in Arguments

Table 1: Platform Built-in Arguments

AttributeValueDescription
allargsallargsThe Command line parser will accept the complete imperas argument set. Note that this option is ignored in some Imperas products

When running a platform in a Windows or Linux shell several command arguments can be specified. Typically there is a '-help' command which lists the commands available in the platforms.
For example: myplatform.exe -help

Some command line arguments require a value to be provided.
For example: myplatform.exe -program myimagefile.elf

Platform Specific Command Line Arguments

Table 2: Platform Arguments

NameTypeDescription
kernelstringvarThe Linux Kernel image e.g. vmlinux
uartconsoleboolvarOpen a console terminal on the UART
uartportuns64varSet the port number to open on the UART and wait for connection



Processor [xilinx.ovpworld.org/processor/microblaze/1.0] instance: microblaze_0

Instance Parameters

Several parameters can be specified when a processor is instanced in a platform. For this processor instance 'microblaze_0' it has been instanced with the following parameters:

Table 3: Processor Instance 'microblaze_0' Parameters (Configurations)

ParameterValueDescription
endianbigSelect processor endian (big or little)
simulateexceptionssimulateexceptionsCauses the processor simulate exceptions instead of halting
mips125The nominal MIPS for the processor

Table 4: Processor Instance 'microblaze_0' Parameters (Attributes)

Parameter NameValueType
C_USE_MMU3uns32
C_MMU_ITLB_SIZE2uns32
C_MMU_DTLB_SIZE4uns32
C_MMU_TLB_ACCESS3uns32
C_MMU_ZONES16uns32
C_USE_EXTENDED_FSL_INSTR1bool
C_FSL_EXCEPTION1bool
C_USE_HW_MUL2uns32
C_PVR2uns32
C_OPCODE_0x0_ILLEGAL1bool
C_FPU_EXCEPTION1bool
C_UNALIGNED_EXCEPTIONS1bool
C_ILL_OPCODE_EXCEPTION1bool
C_DIV_ZERO_EXCEPTION1bool
C_INTERCONNECT1uns32
C_USE_BARREL1bool
C_USE_DIV1bool
C_FSL_LINKS4uns32
C_DEBUG_ENABLED1bool
C_I_LMB1bool
C_D_LMB1bool
C_USE_FPU2uns32
C_USE_MSR_INSTR1bool
C_USE_PCMP_INSTR1bool
C_FAMILY12uns32

Memory Map for processor 'microblaze_0' bus: 'bus1'

Processor instance 'microblaze_0' is connected to bus 'bus1' using master port 'INSTRUCTION'.

Processor instance 'microblaze_0' is connected to bus 'bus1' using master port 'DATA'.

Table 5: Memory Map ( 'microblaze_0' / 'bus1' [width: 32] )

Lo AddressHi AddressInstanceComponent
0x00x1FFFFFFBOOTMEMram
0x814000000x8140FFFFLEDs_8Bitxps-gpio
0x816000000x8160FFFFIIC_EEPROMxps-iic
0x818000000x8180001Fxps_intc_0xps-intc
0x81C000000x81C0003FHard_Ethernet_MACxps-ll-temac
0x836000000x8360FFFFSysACE_CompactFlashxps-sysace
0x83C000000x83C0001Fxps_timer_1xps-timer
0x840000000x8400000FRS232_Uart_1xps-uartlite
0x844000000x8440FFFFdebug_modulemdm
0x846001800x846001FFmpmcmpmc
0x8FFFF0000x8FFFFFFFUNKNOWN_PERIPHram
0x900000000x9FFFFFFFDDR2_SDRAMram
0xA00000000xA1FFFFFFmb_plbxps-mch-emc

Net Connections to processor: 'microblaze_0'

Table 6: Processor Net Connections ( 'microblaze_0' )

Net PortNetInstanceComponent
InterruptInterrupt_netxps_intc_0xps-intc



Peripheral Instances



Peripheral [xilinx.ovpworld.org/peripheral/xps-gpio/1.0] instance: LEDs_8Bit

Description

Microblaze General Purpose IO

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS569 December 2, 2009 v2.00a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-iic/1.0] instance: IIC_EEPROM

Description

Microblaze IIC Bus Interface

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS606 June 22, 2011 v2.03a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-intc/1.0] instance: xps_intc_0

Description

Microblaze LogiCORE IP XPS Interrupt Controller

Licensing

Open Source Apache 2.0

Limitations

This model implements all of the required behavior sufficient to boot Linux

Reference

DS572 April 19, 2010 v2.01a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-ll-temac/1.0] instance: Hard_Ethernet_MAC

Description

Microblaze LogiCORE IP XPS LL TEMAC Ethernet Core

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS537 December 14, 2010 v2.03a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-sysace/1.0] instance: SysACE_CompactFlash

Description

Microblaze LogiCORE SYSACE Interface Controller

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS583 December 2, 2009 v1.01a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-timer/1.0] instance: xps_timer_1

Description

Microblaze LogiCORE IP XPS Timer/Counter

Licensing

Open Source Apache 2.0

Limitations

Resolution of this timer is limited to the simulation time slice (aka quantum) size

Reference

DS573 April 19, 2010 v1.02a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-uartlite/1.0] instance: RS232_Uart_1

Description

Xilinx Uart-Lite

Limitations

Register Accurate & Functional Model

Licensing

Open Source Apache 2.0

Reference

DS573 Jun 22, 2011 v1.02.a

Table 7: Configuration options (attributes) set for instance 'RS232_Uart_1'

AttributesValue
outfileRS232_Uart_1.log
finishOnDisconnect1



Peripheral [xilinx.ovpworld.org/peripheral/mdm/1.0] instance: debug_module

Description

Microblaze Debug Module

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS641 July 23, 2010 v2.00.a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/mpmc/1.0] instance: mpmc

Description

Microblaze Multi-Port Memory Controller

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS643 March 1, 2011 v6.03.a

There are no configuration options set for this peripheral instance.



Peripheral [xilinx.ovpworld.org/peripheral/xps-mch-emc/1.0] instance: mb_plb

Description

Microblaze LogiCORE IP XPS MCH EMC Multi Channel External Memory Controller

Licensing

Open Source Apache 2.0

Limitations

This model implements the registers but has no functional behavior

Reference

DS575 June 22, 2010 v3.01a

There are no configuration options set for this peripheral instance.


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