OVP Peripheral Model: XilinxXpsIic
Model Specific Information
This page provides introductory usage information for an Imperas OVP peripheral behavioral model.
The page is split into sections providing specific information for this peripheral,
including any ports for connecting into a platform, registers, other component parts, and configuration options and general information for peripheral modeling with Imperas OVP.
Description
Microblaze IIC Bus Interface
Licensing
Open Source Apache 2.0
Limitations
This model implements the registers but has no functional behavior
Reference
DS606 June 22, 2011 v2.03a
Location
The xps-iic peripheral model is located in an Imperas/OVP installation at the VLNV: xilinx.ovpworld.org / peripheral / xps-iic / 1.0.
Net Ports
This model has the following net ports:
Table : Net Ports
Name | Type | Must Be Connected | Description |
---|
Interrupt | output | F (False) | |
Bus Slave Ports
This model has the following bus slave ports:
Bus Slave Port: plb
Table 1: Bus Slave Port: plb
Name | Size (bytes) | Must Be Connected | Description |
---|
plb | 0x10000 | T (True) | |
No address blocks have been defined for this slave port.
Platforms that use this peripheral component
Peripheral components can be used in many different platforms, including those developed by Imperas or by other users of OVP. You can use this peripheral in your own platforms.
Table 2: Publicly available platforms using peripheral 'xps-iic'